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Product category: Intellectual Property Cores
News Release from: Gaisler Research | Subject: GRLIB IP core library
Edited by the Electronicstalk Editorial Team on 18 February 2008

Core library is optimised for ASIC
prototyping

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Users of the Synplicity's HAPS ASIC prototyping system can readily download and synthesise a large set of very advanced and mature IP cores from the GRLIB IP core library.

Gaisler Research has been working with Synplicity to ensure that users of the Synplicity's HAPS ASIC prototyping system can readily download and simulate synthesise a large set of very advanced and mature IP cores from the Gaisler Research GRLIB IP core library The GRLIB library from is ideally suited for SoC designs and implements plug and play capabilities that minimise the engineering effort during the design phase

It includes the widely popular Leon3 user-customisable 32bit SPARC V8 processor.

"We are pleased to be working with Synplicity and look forward to a successful partnership to increase the number of IP cores that are supported by their synthesis and prototyping tools, and at the same time ensure that our IP cores are truly portable between design environments", says Per Danielsson, CEO of Gaisler Research.

Synplicity Hardware Platforms Group and Gaisler Research engineering teams are working together to ensure that the GRLIB IP core library is compatible with the Confirma ASIC/ASSP verification platform, covering the Synplify synthesis tool and the HAPS multiple-FPGA motherboards.

"The latest GRLIB release already includes support for the tools on Windows and Linux platforms, and also includes IP cores and templates designs targeting the HAPS motherboards", adds Sandi Habinc, Senior Vice President of Engineering, Gaisler Research.

"Gaisler Research has been constantly delivering advanced and demanding IP cores, our co-operation will ensure compatibility while our tools and motherboards evolve and their cores become more complex", says Lars-Eric Lundgren, Managing Director of Synplicity Hardware Platforms Group, located in Lund, Sweden.

"This partnership will be a great benefit to our mutual customers, providing them with highly competitive and integrated tools, hardware and IP cores".

Synplicity's High-performance ASIC Prototyping System (HAPS) is a high performance and high capacity FPGA based system for ASIC and ASSP prototyping.

HAPS is a modular system with multiple-FPGA motherboards and standard or custom-made daughterboards, which can be stacked together in a variety of ways.

Some of the functions available on standard daughter boards are video processing, various memory types, and interfaces to Ethernet, USB and PCI Express, PCI-X and ARM.

The robust and reliable hardware, together with the modular approach, allows the designer to concentrate on the actual ASIC design, which will shorten the verification time by months.

The GRLIB IP core library with HAPS support is available today and can be downloaded from the Gaisler Research website.

The library includes support for the latest HAPS motherboards, covering HAPS-54, HAPS-52, HAPS-51 and HAPS-31, and also supports a variety of memory and I/O boards.

The library is supported by Synplicity's software solutions operating on Windows and Linux platforms.

The GRLIB IP core library is sold and supported by Gaisler Research and its distributors, whereas HAPS boards and Synplify software are sold and supported by Synplicity and its distributors.

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