Boundary scan controllers cut programming costs

Edited by the Electronicstalk editorial team Nov 16, 2005

New from Goepel Electronic at Productronica 2005 was a series of high-performance low cost JTAG/boundary scan controllers.

New from Goepel Electronic at Productronica 2005 is a series of high-performance low cost JTAG/boundary scan controllers.

The new product family, named ScanBooster, complements the existing spectrum of Scanflex solutions by an independent product range in the lower to mid-range performance area.

The first family member is the ScanBooster/PCI, a JTAG/boundary scan controller on PCIbus basis for test, PLD programming and Flash in-system programming.

"With this new range of controllers we are now able to provide an optimal solution in particular for standard applications with high cost pressure and lower performance requirements", says Bettina Becker, Marketing and International Sales Manager for Goepel Electronic.

"Because of the extended product assortment we are the exclusive vendor of one-stop solutions in all performance and price categories".

The ScanBooster/PCI is equipped with two separate taps and supports a programmable frequency up to 16MHz.

Both taps are independently programmable with regard to output voltage, input voltage, output impedance and input impedance.

By utilising Goepel Electronic's Cion ASICs as driver circuit, the TAPs have outstanding good signal integrity in combination with special features for interface protection.

The controller offers additional resources such as dynamic 32bit parallel I/O, trigger signals, an SCP bus for system extensions and a specific interface for parallel gang testing of up to eight UUT.

The new controllers are interface compatible with former hardware generations.

Previously developed test programs can be cross compatible on each Scanflex platform without recompilation.

The ScanBooster/PCI is fully supported by the industry leading boundary scan software System Cascon.

System Cascon is the only integrated development environment with a specific mixed signal boundary scan programming language (Caslan) for IEEE1149.1/IEEE1149.4 including more than 30 tools for automated test program generation (ATPG), pin failure diagnostics (PFD), in-system programming (ISP) as well as extensive verification through debugging at schematic and layout level.

The first controllers will be available in December 2005.