Product category:
Microprocessors, Microcontrollers and DSPs
News Release from: Hitachi Europe | Subject: HD64404
Edited by the Electronicstalk Editorial
Team on 12 December 2001
Companion chip simplifies CIS and
telematics
Hitachi claims the HD64404 is the world's first companion chip to combine a high-performance graphics processing engine with standard connectivity in a single chip.
Hitachi claims the HD64404 is the world's first companion chip to combine a high-performance graphics processing engine with standard connectivity in a single chip The HD64404 will be used in next-generation car information systems (CIS), such as in-car navigation, multimedia and entertainment systems
This article was originally published on Electronicstalk on 16 Feb 2001 at 8.00am (UK)
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The HD64404 is a companion chip for the SuperH family SH-4 CPU core, and together they provide high-performance, high-functionality CIS at low cost.
The device is compatible with Hitachi's Q-series graphics processors, allowing the reuse of software from previous systems, and offers a new development platform for CIS development.
This enables system developers to achieve a shorter time to market.
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The chip has already been selected by leading in-vehicle equipment manufacturers Delphi Automotive Systems and Siemens VDO Automotive AG of Germany.
Next-generation CIS will integrate real-time traffic, drive system control and Internet-based service information, as well as entertainment and the more traditional functions of road map display and route navigation.
In order to do this, system developers will need to unify a variety of interfaces and peripheral circuits within a single unit, for example CANbus access and entertainment related buses such as MOST (Media Oriented Systems Transport).
They will also need to provide the high processing capability necessary for handling large volumes of data.
The HD64404 simplifies CIS development by incorporating a variety of standard interfaces, including an HCAN2 (Hitachi Controller Area Network) in-vehicle network interface, an I2C interface for connecting audio equipment, an audio CODEC interface and Hitachi S/PDIF (Sony/Philips Digital Interface) for connecting an audio chip, and Hitachi SPI interface for connecting a DSP or similar device.
In addition, a MOST interface is included as an extension bus function, providing support for fibre-optic in-vehicle networks.
The device features a built-in high-performance graphics processing engine, an advanced version of Hitachi's Q-series top-end Q2SD (quick 2D graphics renderer with synchronous DRAM) model which includes additional graphics functions.
It offers high-speed operation of 100MHz and compatibility with the Q2SD's instruction set, allowing Q2SD programs to be used.
It also supports a bit BLT (bit block transfer) and raster operation, with support for an 854 x 480 WVGA screen resolution.
The HD64404 offers a flexible and efficient bus architecture.
Two kinds of external bus, a PC standard PCI bus and a dedicated SH-4 bus, are provided for connecting an SH-4 device, depending on the system configuration.
For its internal bus, a dual-bus-type structure is employed that comprises a register bus for various interfaces and peripheral functions and a high-speed pixel bus for transferring large volumes of data.
This enables efficient data processing to be achieved.
In addition, a Unified Memory Architecture configuration allows the device's graphics memory to be used as system memory, enabling the number of external memory parts to be reduced.
The architecture enables the chip to offer high-end system features to a low cost market.
The HD64404 is available in a small 352-pin TBGA package that allows system size to be minimised.
Sample shipments will begin in February 2002.
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