Product category:
Memory Devices and Modules
News Release from: Hitachi Europe | Subject: HN29V128A and HN29A128A
Edited by the Electronicstalk Editorial
Team on 16 April 2002
Novel Flash design provides 100%
operative memory
Hitachi has released details of its new superAND type Flash memory, the first in the industry to incorporate a memory control function, providing a 100% operative memory area.
Hitachi has released its new superAND type Flash memory, the first in the industry to incorporate a memory control function, providing a 100% operative memory area This new type of memory offers improved operability, very low standby current and compact size, making it suitable for portable devices such as mobile phones, PDAs and digital cameras
This article was originally published on Electronicstalk on 16 Feb 2001 at 8.00am (UK)
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Two series of the new 128Mbit Flash memory are available, the x8 and x16bit HN29V128A series operating at 3.3V and the x16bit HN29A128A series operating at 1.8V.
The superAND memory is based on Hitachi's 0.18um-process multilevel-cell AND-type Flash memory, and offers a large capacity at a reasonable price.
Conventional AND-type Flash memory contains a small percentage of defective sectors, which are normally controlled by an external controller, or by hardware or software on the host equipment.
The new superAND type Flash memory is the first to incorporate a defective sector control function which detects abnormalities in the Flash memory and replaces defective sectors with reserved sectors, thus achieving a 100% operative memory area.
The new memory also has a built-in wear levelling function, which can increase Flash memory life span by ensuring that rewriting is evenly distributed.
It uses a NAND type interface and, with small software modifications, is compatible with all systems using existing NAND type Flash memory.
The new memory has a deep standby function capable of reducing current to 5uA for portable electronic equipment requiring extreme power supply control.
It also supports a power-on read function, which uses two control lines (CE pin and RE pin) to read up to 2Kbyte of information when a system is powered-up, without the input of a command.
By design optimisation, increase of chip size was minimised to only a few percent of Hitachi's conventional monolithic Flash memory, enabling a compact size and reasonable price.
System design support tools are available from June 2002 and include a VHDL model as the functional description model, an IBIS model as the I/O operation model, and a reference driver model in C.
The superAND Flash memory is available in a 48-pin type I TSOP, with the 1.8 V x16 bit HN29A128A0ABP-80 also available in a smaller 72-bump chip-scale package (CSP).
Sample shipments will begin from June 2002.
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