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Product category: Microprocessors, Microcontrollers and DSPs
News Release from: Hitachi Europe | Subject: HJ931201BP
Edited by the Electronicstalk Editorial Team on 16 December 2002

Tiny module combines MCU with SDRAM and
Flash

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A novel family of system-in-package modules uses a three-layer stack structure to combine a high-performance microprocessor with multiple memory chips in a single package.

Hitachi's three-layer stacked HJ931 series is a 'system-in-package' (SiP) or multichip module (MCM) that uses a three-layer stack structure to incorporate a high-performance SuperH microprocessor and multiple memory chips in a single package The first product in the new series, the HJ931201BP, incorporates the SH7705, a 64Mbit synchronous DRAM (SDRAM), and a 16Mbit Flash memory

The series is suitable for use in portable devices such as digital cameras and PDAs.

By employing a three-layer stacked SiP to combine a microprocessor and multiple memory chips in a single package, something that is normally difficult to accomplish with an SoC, the new series dramatically reduces the mounting area required.

The HJ931201BP combines three chips in a 13 x 13mm package that is no more than 1.7mm thick, reducing the mounting area by approximately 65% compared with a configuration using three packages.

This makes it possible to develop more compact systems overall.

The demand for SiP products is growing rapidly due to the advantages they offer over SoC products.

These include shorter development times, lower development costs, and suitability for a wide variety of products in rapidly changing market conditions.

SiP also simplifies the design of a system.

For example, having the microprocessor and memory in a single package means that the user does not need to design a high-speed bus to link the individual chips.

Additionally, the increased compactness means shorter circuit board wiring, which in turn reduces susceptibility to electromagnetic noise and allows more stable high-speed operation.

SiP products have a short development time of just five to six weeks, from the choice of specifications to the availability of samples, if existing LSI chips are employed.

However, it is also possible to incorporate custom ASIC devices.

The SH7705 used in the HJ931201BP is built on the SH-3 CPU core that is designed for use in low-power devices.

It has a fast operating frequency of 133MHz and a low internal logic operating voltage of 1.5V.

This makes it ideal for portable products such as PDAs that require high performance and low power consumption.

The HJ931201BP uses a LFBGA 240-pin package configuration.

A JTAG emulator is available as a support tool for designing systems that incorporate the new series.

Samples of the device will begin shipping in December 2002 in Japan.

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