Rad-hard SoI process evolves to 150nm node

Honeywell has developed a 150nm 15-million-gate IC technology that exponentially increases speed and bandwidth capabilities for processing and transmitting data in aerospace systems.

Honeywell has developed a 150nm 15-million-gate IC technology that exponentially increases speed and bandwidth capabilities for processing and transmitting data in aerospace systems, including space satellites and networked battlefield systems.

"This new application specific integrated circuit technology platform meets the speed and performance requirements of advanced flight and navigation systems, satellites, communications, radar equipment and smart munitions in development today", said Gary Kirchner, Director of Engineering and Technology, Defense and Space Electronic Systems, Honeywell.

"By adapting commercial technologies and design flow methods, Honeywell has been able to rapidly meet military and aerospace demand for next-generation components", Kirchner said.

Reducing the feature size of individual transistors to 150nm allows designers to place nearly four times more transistors on an IC than previous generation technology, and significantly increases data computing volume and speed.

Honeywell also provides a production infrastructure that supports scalable volume foundry services for commercial and strategic, high-performance integrated circuits and SoCs.

"We will be providing access to this long life-cycle technology through a reliable, onshore trusted foundry source", Kirchner said.

The Defense Threat Reduction Agency (DTRA) and Wright Patterson Air Force Base provided development funding to accelerate Honeywell's 150nm radiation hardened silicon-on-insulator CMOS technology and onshore manufacturing line.

Honeywell codeveloped the silicon-on-insulator 150nm technology with Cypress Semiconductor Corp.

Cypress will provide foundry services to Honeywell for initial 200mm wafer production.

The 150nm process will be ported to Honeywell's 200mm foundry, which currently is under construction near Minneapolis.

The silicon-on-insulator process is reaching manufacturing maturity for initial customer design prototyping.

Honeywell's fabrication facility will begin producing radiation hardened 150nm ICs in early 2005.

An ASIC cell library and design toolkit are available now for evaluation.

The 150nm technology and development process evolved from Honeywell's five-million-gate-capable 0.25-micron technology developed earlier this year and in fabrication at Minneapolis.

Honeywell is collaborating with Synopsys for advanced ASIC design to enable military and aerospace IC designers to rapidly implement deep-submicron multi-million-gate ASICs.

Honeywell and Synopsys jointly offer a collaborative design environment for advanced ASIC design, including a 150nm design flow optimised for Honeywell's process technology, a portfolio of semiconductor intellectual property, and expanded design services options for radiation-hardened ASIC development.

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