Real-time platform for real ASIC prototypes

Available now, Version 2.1 of the Hardi ASIC prototyping system (HAPS) provides real-time speed, real-time debugging and full ASIC functionality for ASIC prototyping designers.

Available now, Version 2.1 of the Hardi ASIC prototyping system (HAPS) provides real-time speed, real-time debugging and full ASIC functionality for ASIC prototyping designers.

HAPS provides up to 8 million ASIC gates running at over 200MHz and lets the prototype have the same functionality and performance as the ASIC.

All issues involved in prototyping board design have been taken care of, including crosstalk, signal integrity, impedance matches, connectivity problems, size and speed.

HAPS enables the designer to spend time on the design rather than the board.

HAPS contains the functionality needed for ASIC prototypes: FPGAs for implementing the ASIC logic, connectors for adding IP-blocks, clock nets designed for high speed, configurable connectivity for partitioning, I/O connections and a carefully planned board running at 200MHz.

Using up to four Xilinx Virtex-II devices, even the largest and most complicated designs can easily be implemented.

HAPS is designed to support any ASIC, without modifications.

The ASIC logic enters the FPGAs and any internal IP on daughterboards.

The width of the FPGA buses is easily selected.

Several standard IPs are available as daughterboards to support any design, including SRAM, Ethernet, PCI and Firewire boards.

Using Hardi's expertise, customer-specific daughterboards can be developed within two weeks.

HAPS can be integrated in a case, which includes power supply and cooling fans.

This makes HAPS completely portable and stand-alone, an advantage for customer presentations and software debugging.

The entire ASIC prototype is stored on a CompactFlash/MicroDrive disc which configures the prototype in seconds.

Encryption ensures that the design is easily kept secret.

HAPS fully supports Xilinx ChipScope and Synplicity's Identify for real-time debugging.

All internal signals can be probed, triggered and viewed in a waveform window.

HAPS supports all synthesis and debugging tools on the market.

Drivers for Synplicity's Certify are also supplied, this being a tool that automates the translation process from an ASIC to FPGAs.

All ASIC-specific codes are implemented efficiently on the board, including IP-blocks.

HAPS and Certify minimise the amount of work on a prototype.

HAPS is available today and pricing starts at $11,900.

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