Product category:
Design and Development Hardware
News Release from: Hardi Electronics | Subject: HAPS-34
Edited by the Electronicstalk Editorial
Team on 06 October 2005
Motherboards master FPGA prototyping
Hardi Electronics has used the ARM Developer's Conference to release a new series of motherboards it claims feature unmatched performance and capacity.
Hardi Electronics has used the ARM Developer's Conference to release a new series of motherboards it claims feature unmatched performance and capacity Based on the largest Xilinx Virtex-4 FPGAs, the HAPS-34 helps both ASIC and ASSP designers to verify their designs quickly and accurately by leveraging the best-in-class I/O connectivity and best-in-class flexibility of the HAPS family of motherboards and daughterboards
This article was originally published on Electronicstalk on 10 Mar 2003 at 8.00am (UK)
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Real-time platform for real ASIC prototypes
Available now, Version 2.1 of the Hardi ASIC prototyping system (HAPS) provides real-time speed, real-time debugging and full ASIC functionality for ASIC prototyping designers.
FPGA board prototypes up to a million ASIC gates
The HAPS FPGA-2x3 is a single-FPGA prototyping board that can be used by itself for up to a million ASIC gates running up to 200MHz or as an addon to HAPS multi-FPGA boards if more capacity is needed.
While competitive fixed-configuration ASIC prototyping products offer hundreds of user configurable I/Os, the HAPS-34 platform motherboard offers designers nearly 3000 user-configurable I/Os.
The HAPS motherboards also offer the industry's only modular system with expandable capacity.
Each motherboard can handle designs from 3-6 million ASIC gates.
Further reading
More scope for ASIC prototyping system
Three new daughterboards add capabilities such as Ethernet, USB and analogue video to the HAPS modular ASIC prototyping system.
Prototyping system hits PCI and PCI-X buses
A new daughterboard provides PCI/PCI-X connectivity to the Hardi Electronics HAPS prototyping system.
Prototyping board offers multigigabit serial links
A new daughterboard in the HAPS family will give customers access to multigigabit serial links and embedded PowerPC processors.
The boards can be stacked to increase capacity to any size ASIC.
No other system on the market today has that level of flexibility.
"We are very pleased to introduce the first of our 3rd generation HAPS motherboards, and to once again provide more ASIC prototyping functionality at a lower cost", said Lars-Eric Lundgren, Hardi CEO.
"Our worldwide customer base is constantly demanding more capacity and higher performance".
"HAPS-34 is the most advanced high capacity FPGA board ever built".
"I am proud to announce that our design team finished the first board in the HAPS-30 family just 9 months after we released the previous HAPS-20 family".
"To me, HAPS-34 is a work of art".
HAPS addresses critical issues regarding prototyping board design such as cross-talk, signal integrity, impedance matching, connectivity problems, gate capacity and system speed.
The HAPS-34 board can be used as a stand-alone device to prototype ASIC designs up to six million ASIC gates.
Connecting two or more HAPS-34 boards together can further increase capacity to virtually any size.
In addition, the HAPS-30 family conforms to the HapsTrak Standard, which guarantees compatibility with previous and future generations of HAPS motherboards and daughterboards, including user developed daughterboards.
The HAPS-34 uses four Xilinx Virtex-4 XC4VLX100/160/200 devices in the largest pin count package, offering 3000 user I/Os and a signalling rate of 1Gbit/s (LVDS) or 600Mbit/s (single ended).
The HAPS-34 has nine I/O-voltage regions on board.
The voltage regions can be individually set to 3.3, 2.5, 1.8 or 1.5V.
All power is generated from a single 5V power source.
HAPS-34 also has 20 global low skew clock signals driven from a variety of sources.
"The HAPS-34 leverages our own high level digital design expertise, and the experience gained from developing two previous generations of ASIC prototyping platforms and from meeting the needs of our worldwide customers, both large and small", stated Jonas Nilsson, Hardi Technical Manager.
"Every single wire on the 20-layer PCB is carefully routed and verified for maximum performance and optimal signal integrity".
"Once again we are pleased to offer the best I/O connectivity, best flexibility, and highest performance available on the market".
"For in-house prototyping teams the HAPS-34 system provides a reliable, well-documented, highly flexible building block", commented John Hoekstra, Hardi North American Sales Manager.
"With the ease of our modular, expandable capacity, prototyping teams can better leverage their expertise making their ASIC HW/SW verification process more robust".
HAPS customers get to verification faster by using off-the-shelf software for synthesis, partitioning and debugging - including Synplicity's Certify which is a complete tool for ASIC prototyping.
For Certify, the design flow is fully supported and carefully tested.
A complete new set of Certify HAPS partitioning board files are available.
For debugging, any of Synplicity's Identify, Temento's DiaLite or Xilinx ChipScope can be used.
The HAPS-34 board will be available for delivery to customers in December 2005 with pricing starting at US $48,000.
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