Product category:
Design and Development Hardware
News Release from: Hardi Electronics | Subject: HAPS-50
Edited by the Electronicstalk Editorial
Team on 05 April 2007
ASIC prototyping board boasts biggest
FPGA
The first member in the new HAPS-50 family is HAPS-52 which has a capacity of 4 million ASIC gates.
The HAPS-50 is the fourth generation of ASIC prototyping boards in the popular HAPS series from Hardi Electronics This new family of motherboards is based on the largest FPGA available today, the Xilinx Virtex-5 LX330, and will help ASIC designers to verify their designs with better performance and larger capacity than ever before
This article was originally published on Electronicstalk on 10 Mar 2003 at 8.00am (UK)
Related stories
Real-time platform for real ASIC prototypes
Available now, Version 2.1 of the Hardi ASIC prototyping system (HAPS) provides real-time speed, real-time debugging and full ASIC functionality for ASIC prototyping designers.
FPGA board prototypes up to a million ASIC gates
The HAPS FPGA-2x3 is a single-FPGA prototyping board that can be used by itself for up to a million ASIC gates running up to 200MHz or as an addon to HAPS multi-FPGA boards if more capacity is needed.
As always with the HAPS system, several boards can be stacked or interconnected to handle virtually any ASIC size, even 30 million gates or more.
The first member in the new HAPS-50 family is HAPS-52 which has a capacity of 4 million ASIC gates.
More boards in the series will be available within two months.
Further reading
More scope for ASIC prototyping system
Three new daughterboards add capabilities such as Ethernet, USB and analogue video to the HAPS modular ASIC prototyping system.
Prototyping system hits PCI and PCI-X buses
A new daughterboard provides PCI/PCI-X connectivity to the Hardi Electronics HAPS prototyping system.
HAPS-52 has a number of important new features including more I/O and inter-FPGA connections, a global bus, more I/O-voltage regions and a more flexible clocking scheme.
In addition, new functions provide improved monitoring and self-test, and remote configuration and setup of the board.
Everything possible is made to reduce the time it takes to get the ASIC design running on this FPGA board.
"The HAPS-50 boards are designed with the intention of supporting new features that will be needed when working with ESL tools", said Jonas Nilsson, CTO of Hardi.
"We are working with Synplicity to make a complete verification system incorporating what ASIC designers need to quickly and accurately verify the ASIC they are working on".
"In addition to powerful and flexible hardware, software tools like Certify and Synplicity's Total Recall technology will be essential as designs become larger and more complex".
"The combination of the HAPS-50 hardware and our Certify software and Total Recall debug technology, provides an extremely powerful environment for ASIC verification", stated Andy Haines, Senior VP of Marketing at Synplicity.
"Synplicity and Hardi engineers are working closely together to make sure customers have a complete design flow with everything from partitioning, synthesis, place and route to debugging".
"Our software will be carefully tested and proven on the HAPS platforms".
The HAPS-50 series of motherboards is fully compatible with all previous generations, including the HAPS-10, HAPS-20 and the HAPS-30 families.
In addition, it meets the HapsTrak standard, which guarantees that all Hardi standard daughterboards and all custom built boards will fit on the new system.
"I am very proud to see that our engineering team once again has designed a new, very innovative product while maintaining full backwards compatibility with all systems we have built in the last five years", stated Lars-Eric Lundgren, President and CEO of Hardi.
"Hardi's approach to ASIC prototyping has always been known for ease-of-use, but with HAPS-50, it was our intention to take this ease-of-use and flexibility to the next level".
The HAPS-52 board will be available for delivery to customers in April at the price of US $47,000.
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