Product category:
Communications ICs (Wired)
News Release from: IDT | Subject: QuadMux flow-control devices
Edited by the Electronicstalk Editorial
Team on 24 June 2003
Flow controllers multiplex four
disparate streams
QuadMux flow-control devices are the latest members of the IDT portfolio of flow-control management ICs.
QuadMux flow-control devices are the latest members of the IDT portfolio of flow-control management ICs The new devices enable high-performance data-flow management by providing four independent ports on one side of the device, each with its own data memory block, and a single bus on the other, enabling the convergence of four different datastreams into a single datapath
This article was originally published on Electronicstalk on 12 Apr 2001 at 8.00am (UK)
Related stories
IDT joins Texas in crossbar low-voltage logic
IDT and Texas Instruments have entered a co-operative agreement to become alternate supply sources of 3.3V crossbar low-voltage technology (CBTLV) bus switch devices.
IP coprocessors provide flexible search width
IDT has released its first commercially available Internet protocol coprocessor product portfolio that enables up to OC-768 wire speed to support ever-increasing packet processing requirements.
The QuadMux family is available in densities from 1.25Mbit (72T55248) to 5Mbit (72T55268).
The QuadMux flow-control devices can be configured for multiplexing, demultiplexing or broadcasting functionality with a total bandwidth of up to 16Gbit/s, making them ideal for a range of communications applications, such as terabit routers and switch, basestation routing systems, as well as data acquisition and imaging applications where data-stream convergence and parallel buffering of multiple datapaths are required.
The new single-chip devices replace traditional and more costly methods of multiplexing multiple data streams at different datarates.
Typically, these types of functions were accomplished with a multiplexer and considerable logic found in ASICs, FPGAs or a combination of standard logic and external memory.
By using a QuadMux flow-control device and offloading the datapath management, a smaller, lower cost FPGA can be used, thereby reducing the cost of the system implementation.
The read and write ports of each of the QuadMux device's four data memory blocks can be configured independently, each with its own datarate of either single-datarate (SDR) or double-datarate (DDR) mode, clocking frequency, voltage and bus width.
By providing five independent and discrete clock domains, the QuadMux flow-control devices enable multiple datastreams to be processed or sent to various subsystems, each running independently, allowing multiple systems or subsystems to interoperate.
The single common port of the device can operate as a x10, x20 or x40bit bus, allowing flexibility in connecting to different subsystems.
All the ports can run up to 200MHz, delivering datarates up to 8Gbit/s in SDR mode and 16Gbit/s in DDR mode.
Finally, the write and read ports of the QuadMux devices have the capability of operating their I/Os independently at 2.5V LVTTL, 1.5V HSTL or 1.8V eHSTL levels.
• IDT: contact details and other news
• Email this article to a colleague
• Register for the free Electronicstalk email newsletter
• Electronicstalk Home Page
Search the Pro-Talk network of sites
