Product category:
Microprocessors, Microcontrollers and DSPs
News Release from: IDT | Subject: CV104, CV105, CV107 and CV109
Edited by the Electronicstalk Editorial
Team on 14 October 2003
Four-PLL design boosts PC clock accuracy
IDT has entered the PC clock market with a family of devices (CV104, CV105, CV107 and CV109) aimed at current desktop computing platforms.
IDT has entered the PC clock market with a family of devices (CV104, CV105, CV107 and CV109) aimed at current desktop computing platforms Leveraging its expertise in providing clock-distribution and clock-generation solutions to the communications IC market, IDT has developed a new PC clock architecture that is the foundation for these new devices
This article was originally published on Electronicstalk on 12 Apr 2001 at 8.00am (UK)
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The IDT PC clock architecture employs four phase-locked loops (PLLs) that, for the first time, allow complete, independent control of key clock circuits within the system, thereby resulting in increased system performance and reliability.
The IDT PC clocks replace traditional three-PLL clock architectures.
The devices, packaged in a 48-pin SSOP, fit seamlessly onto boards that currently employ three-PLL architectures.
Thus, board manufacturers can update their designs to increase system performance with a simple device replacement.
The IDT PC clock architecture offers independent clocking of CPU, PCI (Peripheral Component Interconnect), SRC (Serial Reference Clock) and USB interfaces.
Each clock can be individually optimised within the system, resulting in enhanced system performance.
The CPU clock supports output frequencies up to 533MHz while the PCI clock output supports up to 133MHz, offering frequency overhead well above the range of existing solutions.
The IDT PC clock architecture also incorporates programming that enables a linearly scalable frequency adjustment as opposed to the commonly used discrete stepping approach, allowing enthusiasts the ability to fine-tune their system for better performance.
In addition, with independent spread-spectrum control (SSC), each of the three SSC-capable PLLs within the device can be programmed independently to reduce EMI within the system.
Setting the stage for future growth in this market, the company intends to follow this announcement with a suite of PC clock devices that serve next-generation notebook and desktop computing platforms.
These devices will also be based on the IDT 4-PLL technology.
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