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Product category: Memory Devices and Modules
News Release from: IDT | Subject: 70T651S8 and 70T633S8
Edited by the Electronicstalk Editorial Team on 27 October 2003

Speedy access for large-scale dual-port
memories

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An enhanced 9Mbit asynchronous dual-port memory family boasts the fastest access times in the industry.

An enhanced 9Mbit asynchronous dual-port memory family boasts the fastest access times in the industry The new 9Mbit asynchronous dual-port devices operate at access times as low as 8ns, enabling increased performance for the fastest shared memory applications, including wireless basestations, storage area networks and network switches and routers

Unlike alternative solutions, the new products offer an innovative RapidWrite mode that allows designers to more easily perform sequential write functions - a key capability to ensure optimum write performance - at 8ns cycle times.

The devices are available in both x18 and x36bit configurations, with densities to 256K x 36 (70T651S8) and 512K x 18bit (70T633S8), and are pin-compatible with the company's existing 10ns offerings and 4Mbit asynchronous dual-port products, enabling an easy upgrade path with minimal board changes.

Other unique features include a 2.5V core for low power consumption, selectable 2.5 and 3.3V I/O options for voltage bus matching between two separate domains, and an innovative sleep mode.

In addition to improved performance, the new IDT family of dual-port products provides several mechanisms designed to enable customers to address contention issues between ports, such as "busy" arbitration logic, semaphore flags and interrupts.

More specifically, the busy arbitration logic determines which port has control of the specific memory location, grants control to that port, and then outputs a busy flag on the opposite port to indicate a wait signal until the location is available for access.

Semaphore flags provide a hardware mechanism that allows the designer to manage the use of system resources, including operations within the shared memory itself.

Interrupts provide a specific mailbox location for each port that can be used to enable software to communicate the port status to the opposite port, facilitating interport communication and management of the shared resource.

The devices' new and unique RapidWrite mode allows designers to perform consecutive write cycles without pulsing the write, enabling control pins inactive during address and data transitions.

This device family also provides the industry's largest available asynchronous shared memory size, giving designers the option to eliminate multiple memories in an application, thereby lowering design complexity, board space and cost.

Other features include a JTAG interface, which allows designers to improve manufacturability with enhanced board debug and production diagnostics, as well as space-saving ball grid array packaging.

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