Product category:
Memory Devices and Modules
News Release from: IDT | Subject: IDT72P51769
Edited by the Electronicstalk Editorial
Team on 29 September 2004
Flow-control chip boasts quadruple
performance
The IDT72P51769 is a 4Mbit multi-queue flow-control device that can access data from a single databus and place the data into any of one to 128 queues.
The IDT72P51769 is a 4Mbit multi-queue flow-control device that can access data from a single databus and place the data into any of one to 128 queues The new device boasts a 400% increase in queue partitioning performance over previous offerings, allowing it to replace at least four devices previously required to perform the same functions
This article was originally published on Electronicstalk on 12 Apr 2001 at 8.00am (UK)
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Also, data can be retrieved from any queue onto a single databus, enabling the reordering and prioritisation of information in data acquisition systems and image processing equipment, and ensuring quality of service (QoS) in processing networks.
The IDT72P51769 runs from a low core voltage of 1.8V, resulting in a 25% decrease in overall power consumption.
Using a x36 databus, the IDT72P51769 offers a high data throughput of 7.2Gbit/s.
The IDT72P51769 can be customised to the exact number of queues and individual queue sizes needed through parallel programming.
The added flexibility that enables the device to handle partial packets simplifies the hardware design as well as the software needed to implement the design.
The IDT72P51769 also contains two new features called "mark and rewrite" and "mark and reread", which enable the user to set markers on each queue.
By overwriting data, mark and rewrite offers more flexibility when passing data through a system, effectively dropping unwanted data so it doesn't take up resources through the rest of the system.
Mark and reread allows data to be reread once from a queue or multiple times if retransmission of data is needed.
The IDT72P51769 offers several value-added functions, such as user-selectable I/O on each port to simplify the interfacing of devices operating at different voltage levels, as well as bus matching, frequency matching, configurable queuing and programmable empty, partially empty, full and partially full flagging.
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