Matsushita joins European research initiatives

Matsushita Electric and IMEC are to collaborate on the development and implementation of high-k gate stacks for sub-65nm devices.

Matsushita Electric and IMEC are to collaborate on the development and implementation of high-k gate stacks for sub-65nm devices.

The international technology roadmap for semiconductors (ITRS) has recognised the availability and integration of high-k gate stacks as one of the most difficult roadblocks to overcome.

IMEC is tackling this challenge by global collaboration within two complementary industrial affiliation programmes (IIAPs).

Within the "Advanced high-k dielectrics and metal gates for (sub)-65nm devices" programme the material properties related to the high-k dielectric gate stack are being investigated through physical analysis and electrical characterisation in simple capacitor and transistor structures.

The "Implementation of high-k gate stacks in advanced devices" programme will address the technological problems of compatibility with full front-end-of-line processing and will study aspects related to the influence of the new high-k modules on the device performance.

Matsushita has joined these programmes to develop and implement high-k gate stacks for the sub-65nm node.

As part of the contract, a Matsushita researcher will join IMEC's research team.

The agreement is considered as the start of a long-term partnership between the two organisations.

The work will focus on the implementation of high-k gate stacks in advanced devices.

IMEC is already collaborating on the development of high-k dielectrics with International Sematech and Hitachi.

With Matsushita joining IMEC's high-k programmes, a worldwide consortium of semiconductor manufacturers and IDMs will be well placed to accelerate the development and integration of high-k gate stacks.

"We are very pleased to have one of the leading Japanese IDMs, Matsushita, joining our worldwide research team on high-k dielectrics.

Matsushita enriches the high-k team, currently comprising over 30 full-time experts, with world-class affiliate researchers.

Together, we will take the crucial leap from process step development to device implementation of high-k gate stacks", said Prof Gilbert Declerck, President and CEO of IMEC.

"The addition of Matsushita to this program is a significant extension of our partnerships in the strategically important Japanese sector".

"Low-power-consumption system ICs implemented in sub-65nm technology using high-k gate dielectrics are essential for Matsushita's future information home appliances such as digital TVs, optical discs, and mobile communication equipment.

I look forward to the expected accomplishments coming from joining this notable IMEC programme", said Yukio Furuta, Director of Corporate Manufacturing and Development Division, Semiconductor Company of Matsushita.

"I'm sure that Matsushita's researchers will be excited to work with world-class researchers on this team".

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