Programme to accelerate 157nm lithography

IMEC and International Sematech are to work together in an advanced technology programme aimed at speeding the development of 157nm lithography.

IMEC and International Sematech (ISMT) are to work together in an advanced technology programme aimed at speeding the development of 157nm lithography.

In parallel, several collaboration agreements between IMEC and leading IDMs are also under negotiation.

Although all major hurdles in the development of 157nm lithography have been overcome, a process facilitated by ISMT's early work in building the needed157nm infrastructure, considerable work still lies ahead if 157nm lithography is to be adopted in time.

Important engineering efforts remain with respect to full-field imaging, uniform reticle and pellicle printability, and resist technology.

157nm resist technology is now entering a stage of formulation and process development, but critical issues such as the delay stability, line edge roughness and etch resistance, need to be resolved before volume use for semiconductor device manufacturing will be feasible.

Much of the required work is planned to come out of the 157nm IMEC industrial affiliation program (IIAP) over the next few years.

This program will ramp up to full speed in Q2 of this year, when the world's first 157nm full-field scanner (ASML Micrascan VII) will become operational at IMEC.

A consortium of IC manufacturers, equipment suppliers, as well as resist suppliers and mask shops has already been established.

International Sematech has agreed to join a major portion of this programme.

IMEC's programme will build on the current state-of-the-art technology.

Research will be carried out at IMEC by IMEC employees and industrial assignees from the partner companies and International Sematech on the following topics: hard pellicle printing - understanding and requirements for 65nm imaging; 157nm reticle handling with special attention to organic contamination removal (through 172nm ozone cleaning); monitoring procedures and contamination/purging requirements for stable 157nm imaging on full-field scanners; 157nm resist integration in process flows for critical 65nm node layers; continuous 157nm resist benchmarking; and 157nm reticle defect printability issues.

"A broad range of expertise in various fields is required to solve the significant engineering challenges posed by the development of 157nm lithography", said Dr Luc Van den hove, Vice President of Silicon Process and Device Technology at IMEC.

"While International Sematech's programmes focus primarily on infrastructure development and manufacturing considerations, IMEC distinguishes itself through its process module research.

This agreement will guarantee complementary research work in 157nm at both organisations, and ensure an open information exchange so that the development of 157nm lithography will be as cost-effective and efficient as possible".

"We're pleased that ISMT's pioneering work in building the infrastructure for 157nm lithography and forging industry consensus and direction has provided a solid foundation for IMEC's 157nm programme", said Dr Tony Yen, Director of Lithography at ISMT.

"We're looking forward to working with IMEC in this important program, and to realising the benefits of IMEC's expertise in process development.

This agreement recognises the core competences of both organisations, and once again proves the value of co-operation".

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