More support for germanium initiative

IMEC, Soitec and Umicore have joined forces to help overcome some of the scaling challenges for sub-45nm device geometries identified in the International Technology Roadmap for Semiconductors.

IMEC, Soitec and Umicore have joined forces to help overcome some of the scaling challenges for sub-45nm device geometries identified in the International Technology Roadmap for Semiconductors (ITRS).

Through a groundbreaking collaborative agreement, the three companies will enable fabrication of germanium-on-insulator (GeOI) substrates and development of semiconductor devices on these substrates.

IMEC will leverage the findings of this joint work into its recently launched industrial affiliation programme targeting development of a germanium-based technology to fabricate high-performance CMOS transistors, using process steps compatible with a state-of-the-art IC manufacturing environment.

The resulting technology solution is expected to enable the industry to meet some of the key semiconductor manufacturing requirements at the 45-nm technology node and below.

Due to its attractive chemical and electrical properties, germanium has recently been put forth by the semiconductor industry as a potential replacement for planar silicon, which is unlikely to accommodate the rigorous scaling requirements of sub-45nm geometries.

The material's carrier mobility is higher than that of silicon, for both electrons and holes, and it is expected to be compatible with high-k materials.

Moreover, the dopant activation temperatures are much lower than those required by silicon, facilitating the formation of shallow junctions.

These features make germanium an excellent candidate for substrates that can be used to fabricate high-performance CMOS devices leveraging the existing silicon manufacturing infrastructure, thereby creating an urgent need for high-quality germanium-based substrates.

Each participant in this collaborative effort will contribute state-of-the-art technological expertise in its respective field, sharing data and findings throughout the process.

Umicore, which has a solid background in the commercialisation and development of germanium substrates, will be responsible for the development and production of the 200 and 300mm crystalline germanium wafers.

Soitec will apply its expertise in fabrication methodology, using its proprietary Smart Cut process to transfer a germanium layer from these wafers to form a GeOI wafer.

IMEC will leverage its extensive knowledge of high-k materials, metal gates, device development and characterisation, and process integration to develop a high-k layer deposition technique for GeOI substrates, as well as defect inspection techniques for the completed GeOI wafers.

These activities will enable the wafer suppliers to tune wafer quality towards optimised device performance.

Finally, IMEC will fabricate advanced devices to demonstrate the potential of GeOI substrates for the sub-45nm node.

"It's clear that innovative solutions are required to overcome the scaling challenges for sub-45nm devices.

To solve the channel mobility and gate leakage current problems present in scaled silicon devices, we believe that alternative concepts such as the combination of high-k dielectrics with germanium need to be examined", explained Gilbert Declerck, President and CEO of IMEC.

"We look forward to leveraging our expertise in semiconductor process technology research in helping to identify and solve process challenges in the GeOI technology".

Umicore CEO Thomas Leysen noted, "Our approach allows us to deliver solutions in the form of technology and product advancements to our customers.

This joint effort is a good example of a partnership that will help ensure the commercial viability of advanced, GeOI-based devices in a timeframe compatible with chipmakers' accelerated time-to-market requirements".

Echoing the need for collaboration among best-of-breed suppliers, Soitec's president and CEO, Andre Auberton-Herve, said, "This alliance takes advantage of each company's respective strengths, encouraging technology collaboration among experts in different fields of applications where Smart Cut is providing innovative solutions.

This joint development work is a new major project from the Soitec's Scealab technology platform, which is available to our partners to develop and evaluate new experimental composite substrates engineered to a variety of target application".

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