More wise approach to multifunction device design

IMEC has come up with a new "Double Y" design methodology that facilitates the implementation of multifunction devices supporting an entire application domain.

IMEC has come up with a new "Double Y" design methodology that facilitates the implementation of multifunction devices supporting an entire application domain.

IMEC's approach adds an "inverted Y" on top of the conventional Y-chart approach, which has been commonly used to implement hardware/software codesign.

Although generally accepted as the design methodology for system-on-chip development, the conventional Y-chart approach is not sufficient for the creation of future flexible architectures.

The current Y-chart method visualises the concurrent development of a dedicated architecture and a single application.

From this application code and architecture, the design is implemented in silicon by using compilation, synthesis and place-and-route.

Specific techniques using this Y-chart approach are: hardware/software codesign; mixed-signal codesign; and design of real-time operating systems and middleware.

However, because of technological and economical issues, designs have to become application-domain specific instead of application specific to amortise the growing nonrecurring engineering cost over a large volume.

In addition, products have become multifunctional, offering a wider variety of services.

Just as the mobile phone has evolved to include a camera, global-positioning-system navigation, an MP-3 player, a game console, and other functions, so designers will need the tools to cost-efficiently create complex and demanding multifunction systems.

A "Double Y" approach is required to develop a sufficiently flexible architecture that can be used for a domain of applications.

To this end, the abstraction level of embedded system design needs to be at a higher level than current methodologies in which only a single application and its dedicated architecture are codesigned.

In the Double-Y chart approach, the left side of the top Y optimises the application code so that it can run on a flexible architecture.

This aspect of the design approach is called "software washing" as it will transform a high-level application description (mostly generated without considering the right implementation issues) into a cleaned multithreaded description, properly prepared for implementation on embedded systems (using the standard Y-chart approach).

For example, memory usage and data access requirements will be adapted to the architecture.

The right side of the top Y deals with the design of a "sufficiently flexible" architecture that can efficiently handle the complete domain of applications.

The type and number of building blocks (ie processors, accelerators, fine-and-coarse-grain FPGAs etc), the communication required, the fixed and programmable network, and so on, will be determined.

This is the input (optimally specified for a range of applications) that is needed by the standard Y-chart approach to start from this architectural information to final implementation.

Once the code of the application domain and the flexible architecture characteristics are determined, system houses can map their specific applications following the conventional Y-chart method onto the flexible architecture, thereby codesigning the application refinement, the middleware layer controlling the runtime flexibility, and freezing the remaining architectural design-time flexibility.

IMEC's design technology research targets several aspects of the Double-Y approach.

For example, IMEC's data transfer and storage exploration (DTSE) methodology and task-concurrency management currently being combined with quality-of-experience concepts, support the left side of the top Y.

Research on communication, memory and power-efficient flexible processor architecture contributes to the right side of the top Y.

IMEC's hardware/software codesign methodology OCAPI and research on RTOS, middleware and compiler techniques for coarse grain arrays target the design steps of the bottom Y.

"IMEC has a long track record in the development of innovative design technologies which contributed already to this Double-Y approach", said Rudy Lauwereins, Vice President Design Technology for Integrated Information and Communication Systems IMEC.

"Several of these methodologies are now being used by the industry via spinoff companies such as CoWare, PowerEscape and Target Compiler Technologies.

To implement the Double-Y approach, companies ranging from compiler houses, RTOS vendors, place-and-route, verification, hardware/software codesign companies (such as CoWare) to software-washing suppliers (such as PowerEscape for data and memory optimisation within application threads) have to collaborate.

The new Double-Y approach requires strong interaction between many companies at different points in the value chain, which will lead to the advent of industrial communities.

"CoWare continues to make aggressive investments in System Level Design", said Karl Van Rompaey, CTO, CoWare.

"By partnering with leading research institutes such as IMEC on these types of future design technologies, we can balance product development and research efforts very effectively and ensure we are providing a constant stream of breakthrough technology for our customers".

According to IMEC, the Double-Y methodology will allow design of architectures that are flexible enough to implement an application domain, while amortising the growing nonrecurring engineering cost over a larger volume.

Back to top