Thin-film process aids passive integration

IMEC has created 5 and 15GHz low-power VCOs by post-processing high-Q inductors on top of 90nm RF CMOS devices using a thin-film wafer-level packaging technology.

IMEC has created 5 and 15GHz low-power voltage controlled oscillators (VCO) by post-processing high-quality (Q) inductors on top of 90nm RF CMOS devices using a thin-film wafer-level packaging (WLP) technology.

These results prove that IMEC's WLP technology is a promising solution for the integration of low-power high-performance RF and microwave systems.

As transistor dimensions scale down and CMOS and SiGe are increasingly replacing GaAs for microwave and millimetre-wave applications, circuit performance becomes increasingly determined by the on-chip passive component quality.

However, in the attempt to keep pace with this evolution, thinner on-chip metals and dielectrics have an unfortunate effect on the Q factor of on-chip passives.

A cost-effective and attractive solution is to create inductors using thin-film WLP techniques.

IMEC's thin-film technology uses alternating layers of BCB (benzo-cyclobutene dielectric) and thick electroplated Cu layers deposited on top of the passivation.

The post-processing is compatible with both Cu and Al back-end.

The technology is cost-effective and consumes no additional silicon real estate.

Measurements performed on MOS transistors and back-end interconnects show no important performance shifts after post-processing.

The WLP inductors have increased performance and resonance frequency as compared with back-end versions enabling the design of high-performance low-power circuits such as VCOs.

IMEC has applied this technology to realise 5 and 15GHz low-power VCOs in 90nm CMOS.

The VCOs use 3 and a 0.6nH WLP inductors, respectively, without ground shielding, resulting in differential Q factors of 40 and 55, respectively.

The Q factor can even be increased by applying a polysilicon ground shield.

The 5 and 15GHz VCOs show low core power consumption of 0.33 and 2.76mW, respectively, with phase-noise of -115 and -105dBc/Hz (at 1MHz offset) and a tuning range of 148 and 469MHz.

For comparison, a 6.3GHz 90nm VCO using a back-end inductor with patterned ground shield has a core power consumption of 5.9mW with a phase noise of -118dBc/Hz at 1MHz.

The thin-film technology can be applied both on active wafers (WLP) as on an intermediate glass or high-resistivity silicon substrate (thin-film system-in-a-package (SiP) or MCM-D).

These results prove that thin-film technology allows integrating high-Q passives in miniaturised system-on-chip (SoC) and SiP for wireless telecommunication applications covering the 1 to 5GHz mobile-phone standards up to 77GHz automotive radar.

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