Research agreement targets sub-32nm memory

PSC will collaborate with IMEC's advanced lithography program addressing immersion, double patterning and EUV lithography challenges.

Powerchip Semiconductor Corporation (PSC) has entered into a partnership with IMEC to perform research and development for the sub-32nm memory process generations.

As part of the agreement, PSC will collaborate with IMEC's advanced lithography program addressing immersion, double patterning and EUV lithography challenges.

From March 2008 onwards, PSC researchers will reside at IMEC to closely collaborate with IMEC's researchers.

Powerchip Semiconductor Chairman Dr Frank Huang said "PSC has decided to sign an agreement with IMEC to participate in its global research network, in order to accelerate the advancement of process technology and to take a step further in increasing PSC's high-efficiency production".

Professor Gilbert Declerck, President and CEO of IMEC, said "PSC's joining demonstrates our ambition to further expand our program with new partners, on the path to technologies below 32nm".

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