Less loss from dual PWM controllers

The Endura ISL6530 and ISL6531 are dual PWM regulator ICs designed to power double-datarate SDRAMs on computer motherboards and systems.

The Endura ISL6530 and ISL6531 are dual pulsewidth modulation (PWM) regulator ICs designed to power double-datarate (DDR) synchronous dynamic random access memory (SDRAM) on computer motherboards and systems.

"DDR SDRAM is growing in popularity over standard SDRAM on PC motherboards because it offers faster data access and improves program performance", said Rick Furtney, vice president and general manager of Intersil's Analogue Business Unit.

"Intersil has addressed the special power needs of DDR memory and offers manufacturers a highly integrated solution that reduces parts count, saves board space and improves power efficiency compared with separate solutions".

The ISL6530 and ISL6531 provide a highly integrated total power solution for DDR SDRAM main memory in systems based on virtually any popular processor (eg Intel and AMD) and system logic chipset combination.

They are particularly well suited to server and workstation applications where large memory arrays require very high core and termination currents.

These devices are the first, dual synchronous PWM buck controllers that are fully compliant to the DDR memory power requirements.

The new power controllers are 5V input devices and provide three regulated voltage sources: a VDDQ chip voltage that provides the main power to the memory, a Vref low-power reference source that tracks the middle point of VDDQ, and a VTT voltage source that powers parallel termination resistors and also tracks the middle point of the VDDQ voltage.

The ISL6530 and ISL6531 use a cascaded approach where the DDR memory line termination voltage, VTT, is created from the DDR memory voltage, VDDQ.

This cascaded architecture provides increased benefits compared to using independent controllers for VDDQ and VTT.

The VDDQ convertor in the cascaded topology need only be rated for half the current compared with an independent architecture.

Also, because of the lower input voltage for the VTT convertor, switching losses are much lower, leading to higher efficiency.

Finally, when the VTT voltage is created from the VDDQ voltage, several protection features, such as VTT overvoltage and overcurrent protection, become automatic due to the enhanced architectural implementation of the design.

Intersil's new DDR memory power solution comes in a 24-lead SOIC or 32-lead 5 x 5mm MLF package, offering significant space savings, and includes complete circuit layout and reference designs, evaluation platforms and technical support.

Each IC offers a highly integrated set of optimised features to provide the most space-saving and power efficient DDR memory power solution.

The ISL6531 includes internal compensation on the VTT regulator to further reduce parts count and ease circuit design.

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