Serial transceivers take ESD protection onboard

Three new Intersil Linearlink RS485/422 serial data transceivers, the ISL8487E, ISL81487L and ISL81487E, all incorporate ESD protection.

Three new Intersil Linearlink RS485/422 serial data transceivers, the ISL8487E, ISL81487L and ISL81487E, incorporate ESD protection.

All three ICs are half-duplex fractional-load transceivers that operate from a nominal 5V supply over a wide +/-10% tolerance voltage range of +4.5 to +5.5V, which relaxes supply requirements and reduces costs.

The greater than +/-15kV ESD protection on all Rx and Tx pins ensures robustness for reliable operation in applications where electrostatic voltage discharged into plugs and jacks by human contact poses a reliability threat.

This ESD-protected family also offers very low quiescent current, extremely low shutdown current and less bus loading with lower input current than competing ICs that they replace.

The ISL8487E, ISL81487L and ISL81487E are eighth-unit-load transceivers that increase the number of devices allowed on the bus up to 256 from the traditional single unit load limit of 32.

This eliminates the need for repeaters in large data-collecting or control networks.

Applications for these fractional-load transceivers include, but are not limited to, factory automation, security networks, process control, plant environmental control and remote sensing and metering.

The ISL8487E and ISL81487L are slew-rate limited for error free data transmission in applications where the datarate is less than 250Kbit/s, typically used for long data-collecting networks, up to 1km.

Slew-rate limiting reduces EMI and minimises reflections from improperly terminated transmission lines, or unterminated stubs in multidrop and multipoint applications.

The ISL81487E can operate up to 5Mbit/s for high-speed applications over shorter networks.

All three ICs are half-duplex transceivers whose receive and transmit functions are multiplexed, reducing package size and pin count to only 8-leads.

Rx inputs feature a fail-safe-if-open design, which ensures a logic high Rx output if Rx inputs are floating.

This prevents the Rx output from chattering, and accidentally generating interrupts, if the receiver becomes disconnected from the bus.

A "lockout" feature keeps the Rx output disabled, when exiting shutdown, until the Rx has determined what state it should go to.

This prevents the Rx output from accidentally generating an interrupt while the Rx wakes up.

Driver outputs are short circuit protected, even for voltages that exceed the supply voltage.

Additionally, on-chip thermal shutdown circuitry disables the Tx outputs to prevent damage if power dissipation becomes excessive.

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