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Upgrade speeds synthesis and timing software

An Incentia Design Systems product story
Edited by the Electronicstalk editorial team Jun 9, 2004

The latest versions of TimeCraft, DesignCraft and DesignCraft Pro feature improved runtime, capacity and quality, when compared with the 2003.09 release.

Incentia Design Systems has launched the 2004.05 releases of its timing analysis, logic and physical synthesis software products TimeCraft, DesignCraft and DesignCraft Pro.

Incentia's 2004.05 release improves runtime, capacity and quality, when compared with its 2003.09 release.

"We have made significant improvements to our synthesis software, and are very pleased to have our customers report runtime reductions from 12 to 2h on a 3GHz Linux platform with our new release", said Arthur Wei, Vice President of Operation at Incentia.

Incentia's DesignCraft logic synthesis software achieves a 3x runtime speedup on average when compared with the previous release.

One customer reported a 6x speedup in runtime for a 5-million gate design.

The runtime improvement is mainly due to Incentia's new concurrent CREST (critical region extracting synthesis technology) algorithm that identifies multiple critical regions and performs concurrent optimisations.

It speeds up important transformations, such as worst and total negative slack optimisations, leakage power optimisation, area recovery, design rule and hold time fixes, and DFT optimisation.

Quality improvements for timing critical designs include area reduced by up to 10%, and total negative slack reduced by up to 30%.

Incentia's DesignCraft Pro also achieves a 3x runtime speedup on average by applying the concurrent CREST algorithm to its physical optimisations.

It improves congestion and routability, and reduces memory usage, so that capacity can increase by up to 15%.

On the quality side, area improves by 10% on average due to an enhanced area recovery algorithm.

Total negative slack improves by up to 30%.

Incentia's TimeCraft static timing analysis software achieves a 2x runtime speedup on average.

For example, a customer reported a 4x speedup in runtime for an 11-million-gate design on a 64bit Sun Solaris platform.

The improvement is due to a proprietary parallel look-ahead pruning algorithm for finding critical paths.

Additional analysis features are also available to handle complicated clock tree structures.

In addition to the Linux 32bit, Sun Solaris 32 and 64bit, and HP 32 and 64bit platforms, all Incentia products are also now available for the AMD 64bit Linux platform.

Incentia offers three major products for synthesis and timing analysis.

TimeCraft is a full-chip, gate-level static timing analyser, offering fast analysis speed for timing sign-off and engineering change orders (ECOs).

DesignCraft is a logic synthesis tool with datapath, test and low power options.

DesignCraft Pro is a physical synthesis tool that solves timing closure and issues and shortens turnaround time.

All products are based upon a unified timing engine and database and address the ever growing design requirements of speed, performance and capacity.

Incentia's 2004.05 release is available now on Sun Solaris (32 and 64bit), Linux (32 and AMD 64bit), and HP (32 and 64bit) platforms.

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