Product category:
Standard Logic Devices
News Release from: Inphi Corp | Subject: CU877, SSTUA32866 and SSTUA32868
Edited by the Electronicstalk Editorial
Team on 13 October 2004
Register and PLL boost memory module
bandwidth
Inphi Corp is delivering the industry's first register and phase lock loop for registered DIMMs operating at 667 and 800Mbit/s using DDR2 technology.
Extending its technology leadership in precision timing and high speed electronic components, Inphi Corp is delivering the industry's first register and phase lock loop (PLL) for registered DIMMs (RDIMM) operating at 667 and 800Mbit/s using DDR2 technology Both the PLL and register are part of the company's ExacTik Family of precision timing devices
This article was originally published on Electronicstalk on 13 Oct 2004 at 8.00am (UK)
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Clock driver performs in DDR2 tester
CST has selected the Inphi INCU877 PLL clock driver IC as the memory clock buffer for use on the CST SP3000-DDR2 tester.
The Inphi products, CU877, SSTUA32866 and the SSTUA32868 support existing standards of DDR2-400 and DDR2-533 as well as new standards for server memory operating at DDR2667 and DDR2-800.
Using its expertise in high-frequency and analogue chip design enabled Inphi to achieve this substantial market lead in the development of next generation higher data rate DDR2 logic for RDIMMs.
"This announcement exemplifies Inphi's continued drive to deliver cutting-edge solutions that speed development and adoption of DDR2 applications", commented Desi Rhoden, Chairman of the JEDEC Memory Committee and Executive Vice President of Inphi Corp.
"By working closely with JEDEC and our customers, we have again been able to set the bar in terms of precision performance".
The Inphi SSTUA32866 and SSTUA32868 1.8V configurable registered buffer with parity for DDR2 RDIMM applications meets or exceeds all electrical specifications adopted by JEDEC.
In addition to increasing the application frequency from 270 to 410MHz, the devices also make significant improvements in AC switching characteristics.
For example, the specification for propagation delay was reduced from 2.35ns for DDR2-533to 1.8ns.
Propagation delay is a critical parameter for servers as the move to faster datarates shortens the clock period - and hence the time memory devices have for reading and writing data.
The propagation delay through the register device consumes the largest portion of this clock period.
The Inphi CUA877 PLL clock driver for registered DDR2 DIMM applications meets or exceeds all of the electrical specifications adopted by JEDEC.
In addition to increasing the application frequency from 270 to 410MHz, the devices also make considerable improvements in terms of lowering jitter, duty cycle distortion, dynamic phase offsets and skew.
The Inphi CUA877, SSTUA32866 and SSTUA32868 are all currently shipping.
The parts are priced beginning at $3.10 for quantities of 100,000 units.
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