Tutorial to explain DDR/DDR2 memories

Edited by the Electronicstalk editorial team Mar 8, 2005

Inphi Corp is to present a DDR/DDR2 tutorial in conjunction with Samsung Semiconductor on both Thursday 31st March and Friday 1st April at the JEDEX Conference in San Jose, California.

Inphi Corp is to present a DDR/DDR2 tutorial in conjunction with Samsung Semiconductor on both Thursday 31st March and Friday 1st April at the JEDEX Conference in San Jose, California.

DDR2 is the current state-of-the-art in industry standard DRAM and the driver for the next several years in designs of all types, including the upcoming FBDIMM.

The tutorial, presented by experts Desi Rhoden of Inphi Corp who serves as JEDEC Committee Chairman Memory Products, and Dong Yang Lee of Samsung Semiconductor who also works as JEDEC Committee Chairman DRAM Timing and Parametrics, will provide a detailed interactive introduction to users of synchronous DRAM with emphasis on DDR1 and DDR2.

The tutorial will cover concepts and features of synchronous and source synchronous DRAM to enable the system designer to make informed design decisions specifically for products containing any of the family of DDR SDRAM memories.

The similarities and differences between DDR1 and DDR2 will be explained along with background information enabling the participants to make the design trade offs that best suits their particular design objective.

Desi Rhoden has been a driver of JEDEC memory standardisation and high performance system design for 20 years.

His experience spans a broad range of fields including memory and high performance systems.

He is the author and task group chair responsible for creating the industry's first SDRAM standard.

Additionally, Rhoden serves on the EIA (Electronic Industries Alliance) Board of Governors where he represents JEDEC and the semiconductor industry.

Rhoden is an Executive Vice President for Inphi Corp, where he focuses on product development and customers who are designing next generation systems.

Dong Yang Lee was lead designer for the world's first DDR SDRAM and a principle architect of the first DDR standard.

He is the author of the JEDEC JESD79-2 DDR2 SDRAM specification and several other JEDEC memory standards that have been adopted over the last nine years.

He works as a Manager with Samsung responsible for future memory product definition, and is a recognised industry expert in memory and memory subsystem design.