Product category:
Standard Logic Devices
News Release from: Inphi Corp | Subject: INSSTUB32866
Edited by the Electronicstalk Editorial
Team on 14 April 2005
Double-datarate buffer runs up to
800Mbit/s
Inphi Corp reckons it has developed the world's first double datarate (DDR2) configurable registered buffer with parity checking operating at 800Mbit/s.
Inphi Corp reckons it has developed the world's first double datarate (DDR2) configurable registered buffer with parity checking operating at 800Mbit/s A member of the Inphi ExacTik Family of industry-leading precision timing devices, the new product complements the company's DDR2 registered buffers with parity checking operating at 400, 533, 667 and 800Mbit/s
This article was originally published on Electronicstalk on 13 Oct 2004 at 8.00am (UK)
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Clock buffer enables novel memory modules
Zero-Buffer DDR (ZB-DDR) technology is a novel technique for unbuffered memory modules developed jointly by memory supplier OCZ Technology Group with Inphi Corp.
Register and PLL boost memory module bandwidth
Inphi Corp is delivering the industry's first register and phase lock loop for registered DIMMs operating at 667 and 800Mbit/s using DDR2 technology.
The Inphi product, SSTUB32866 supports all existing standards of DDR2-400 and DDR2-533 as well as standards for server memory operating at DDR2-667 and DDR2-800 rates.
The new registered buffer allows customers to immediately incorporate the world's most advanced timing devices into their high performance workstations, middle and high performance servers, and high reliability systems, while capitalising on higher datarate DDR2 technology.
"This new product highlights Inphi's commitment to working closely with JEDEC and our customers, to rapidly integrating newly-defined technology, and to leveraging our technology and manufacturing expertise to deliver the world's highest precision solutions", said Desi Rhoden, Chairman of the JEDEC Memory Committee and Executive Vice President of Inphi Corp.
Further reading
Clock driver performs in DDR2 tester
CST has selected the Inphi INCU877 PLL clock driver IC as the memory clock buffer for use on the CST SP3000-DDR2 tester.
Buffers are ready for next-generation memories
Inphi Corp has released the world's first registered buffer with parity checking operating at 400, 533 and 667Mbit/s using second-generation double-datarate (DDR2) technology.
"This product further extend Inphi's market lead, making Inphi the world's only logic vendor to delivers all five registers for DDR2 operating at 400, 533, 667 and 800Mbit/s using DDR2 technology".
The Inphi INSSTUB32866 configurable 25bit 1:1 or 14bit 1:2 register exceeds all JESD82-10 performance specifications for DDR2-400 and DDR2-533 rates and all future performance specifications for DDR2-667, DDR2-800 rates.
The part is available in normal or standard 96-ball LFBGA leaded, lead- free and "green" (lead and halogen-free) packages.
The new registered buffer is designed for nominal 1.8V power supply operation.
It supports DDR2 registered DIMM (RDIMM) module E, F, G, H, J, N and complies with DDR2 SDRAM over/undershoot specification as defined in JESD79-2.
A unique feature of the INSSTUB32866 exhibits the lowest propagation delay in the industry which gives module manufacturers the highest margin in production.
In addition, the INSSTUB32866 meets a much tighter minimum and maximum delay window.
This allows memory vendors to use a single register for all four speed grades reducing costs and reducing the bill of materials.
Up to now a memory module manufacturer would need to use up to three different registers to perform the same function as the INSSTUB32866.
The Inphi INSSTUB32866 is currently shipping in production quantities with pricing starting at $3.63 in quantities of 10,000 units.
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