Product category:
Test Accessories
News Release from: Inphi Corp | Subject: DDR3 CRB
Edited by the Electronicstalk Editorial
Team on 31 January 2008
Board sets the standard for DDR3 testing
Clock reference board enables memory module and system designers to validate DDR3 RDIMMs and simulate system-level functionality effectively and efficiently.
A ground-breaking DDR3 clock reference board (CRB) from Inphi Corp performs beyond JEDEC DDR3-1600 specifications, achieving clock speeds of 800MHz Designed specifically for high performance RDIMM testing, the DDR3 CRB enables major memory module and system designers to validate DDR3 RDIMMs and simulate system-level functionality effectively and efficiently, providing a comprehensive validation tool for DDR3 register/PLLs
This article was originally published on Electronicstalk on 13 Oct 2004 at 8.00am (UK)
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Register and PLL boost memory module bandwidth
Inphi Corp is delivering the industry's first register and phase lock loop for registered DIMMs operating at 667 and 800Mbit/s using DDR2 technology.
The DDR3 CRB is part of Inphi's market-leading ExacTik product family.
A comprehensive GUI-based test executive provides a user-friendly interface to develop custom validation routines.
Only Inphi's DDR3 CRB's flexible design enables users to effortlessly customise device test conditions to meet their specific needs.
A fully programmable pattern buffer delivers more accurate test results by allowing customers to create test conditions specific to their applications rather than relying on limiting preprogrammed patterns.
"Micron is pleased to have worked with Inphi on development of their DDR3 clock reference board and are impressed with the performance advantages it has achieved", says Brett Williams, Senior Marketing Manager for Computing at Micron Technology.
"We are encouraged with Inphi's commitment to the DDR3 register market, providing a quality platform that allows us to effectively validate our DDR3 parts".
The Inphi DDR3 CRB allows design teams to adjust timing for control or address lines in 10ps steps, allowing them to precisely resolve limits on their designs and providing more reliable test results.
In addition, the DDR3 CRB uses the open source Python GUI, an easy-to-use interface that permits users to effortlessly create unique customisations.
An available external clock reference and input drive signal control further distinguish the Inphi solution.
The DDR3 CRB delivers the industry's best signal integrity as input signals are buffered to provide clean reference signals, margin and voltage timing.
Additionally, customers can perform a more complete test that discovers bugs earlier in the design cycle simply by adjusting the Vdd and/or Vref power.
The DDR3 CRB is available immediately and is expected to sell for US $5000.
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