Product category:
Communications ICs (Wired)
News Release from: Inphi Corp | Subject: 3200EC
Edited by the Electronicstalk Editorial
Team on 20 February 2008
Clock recovery chip enables 10Gbit/s
comms
Single-chip device integrates patented analogue signal processing EDC technology with XFI-compliant transmit and receive CDRs in a compact 7 x 7mm QFN package.
New from Inphi Corp, the 3200EC is a 10Gbit/s dual clock data recovery (CDR) chip with electronic dispersion compensation engine (EDC) for use in 10GBase-LRM (LRM) XFP modules The feature-rich single-chip device integrates Inphi's patented analogue signal processing EDC technology with XFI-compliant transmit and receive CDRs in a compact 7 x 7mm QFN package
This article was originally published on Electronicstalk on 13 Oct 2004 at 8.00am (UK)
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Replacing up to three separate chips, the 3200EC simplifies the design and reduces the bill of materials of an XFP transceiver module.
Used with Inphi's field-proven 1348TA linear transimpedance amplifier (TIA), the 3200EC offers a total solution to reduce development costs and accelerate delivery of standards-compliant 10GBase-LRM XFP modules to the market.
The 3200EC is the latest addition to Inphi's industry-leading PhyOptik product family.
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"Currently, there are no XFP solutions for 10 Gigabit Ethernet backhaul on the installed base of legacy multimode fibre", says John Monson, Vice President of PhyOptik Marketing at Inphi Corp.
"The 10GBase-LRM standard was specified to solve this problem, but has previously not been available in this form factor due to its unique combination of power, performance and small size".
"The 3200EC has been specially designed to enable this new generation of Ethernet connectivity for enterprise switch customers".
The 3200EC is a single-chip dual CDR with receiver EDC, suitable for building LRM-compliant XFP transceiver modules.
Based on Inphi's analogue signal processing (ASP) EDC technology, the device offers robust performance across the LRM-specified comprehensive stressed receiver sensitivity tests (CSRST) and optical power ranges.
The 3200EC has been extensively tested with linear TIAs from multiple manufacturers, including the Inphi 1348TA, to ensure operation across all module operating conditions.
When used in combination with the 1348TA, the 3200EC offers transceiver module manufacturers a one-stop proven solution, minimising development efforts and accelerating product delivery schedules.
To ensure module compliance to XFP MSA specifications, the 3200EC features an XFI-compliant host-side interface, including input equalisation and output pre-emphasis, establishing a robust 10Gbit/s link between the module and the host system.
In addition, the two integrated CDRs meet the XFP MSA jitter tolerance, jitter transfer bandwidth, and jitter peaking requirements with ample margin.
The device also offers a built-in XFI-compliant loss of signal (LOS) pin for direct connection to the module RX-LOS pin.
Line-side and host-side loopback functions are also integrated to aid in debugging during development or in the field.
Owing to the integration of multiple functional blocks and the patented EDC technology, the 3200EC achieves lower power consumption and reduced bill of materials than equivalent solutions.
Furthermore, the onboard microcontroller and nonvolatile memory enable the device's stand-alone operation, hence simplifying module design.
As a result, optical transceiver modules fully compliant to the LRM and XFP MSA specifications are realisable in under 2.5W of power.
The 3200EC is offered in a RoHS-compliant 7 x 7mm 48-pin QFN package, with an operating case temperature range of 0 to 85C.
The 3200EC is available immediately as engineering samples with mass production expected in Q2 2008.
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