Product category:
Intellectual Property Cores
News Release from: inSilicon Corp | Subject: Serial telephony controller IP
Edited by the Electronicstalk Editorial
Team on 02 March 2001
Serial telephony controller for voice
over data
inSilicon has introduced a new serial telephony controller (STC) IP that enables a highly cost-effective and scalable solution for next-generation voice-over-data gateways.
inSilicon has introduced a new serial telephony controller (STC) IP that enables a highly cost-effective and scalable solution for next-generation voice-over-data gateways Allowing voice data to and from as many as 128 phone lines over broadband networks, the STC converts digital voice packets and formats them into a serial broadband data stream that can be merged with other data coming from devices such as personal computers or printers
This article was originally published on Electronicstalk on 18 Jan 2001 at 8.00am (UK)
Related stories
inSilicon gets physical with USB 2.0
inSilicon has announced the availability of its initial USB 2.0 physical layer (PHY) semiconductor intellectual property product.
Accelerator IP puts Java in hardware
inSilicon Corp has introduced the JVXtreme Accelerator, a performance-enhanced extension of the company's proprietary JVX Java acceleration technology announced last June.
Used In conjunction with inSilicon's previously announced DMA UTOPIA and the company's other related communications technologies including USB, IEEE1394 and Ethernet, inSilicon is the only IP provider with a comprehensive portfolio of all of the connectivity technologies needed for a complete gateway solution.
Using inSilicon's technology, broadband service providers of DSL, cable, wireless, frame relay, and other service types - can offer a cost-effective, high-performance system-on-chip solution to handle the local area connectivity requirements of voice and data transmission required for integrated access device (IAD) markets.
IAD products include residential and small-office home-office (SOHO) gateways, and set-top boxes and game platforms extended by gateway functions.
Further reading
Host controller completes USB 2.0 IP suite
With the introduction of a Universal Serial Bus 2.0 Host Controller, inSilicon now claims to offer the industry's first complete USB 2.0 semiconductor IP product suite.
Universal Serial Bus controller on an FPGA
Insight Electronics and inSilicon Corp have announced the availability of the Universal Serial Bus (USB) 1.1 device controller for Xilinx FPGAs.
IP puts Gigabit Ethernet MAC on chip
The latest addition to the Gigabit Ethernet intellectual property product line from inSilicon Corp is a Gigabit Ethernet MAC subsystem (GMAC subsystem).
While Ethernet, Universal Serial Bus and other networking devices can easily accommodate local area transmission of data, they are not adequate for transmitting large amounts or multiple channels of voice traffic.
Voice transmission must recognise the time criticality of the bits being transmitted.
To support multiple phone lines, a system must be capable of multiplexing multiple independent voice bit streams together, and assigns each channel a time slot to guarantee bandwidth availability and ensure voice quality is sustained.
For compatibility with the massive installed base of existing phone technologies, voice enabled broadband devices must either directly interface to the POTS (plain old telephone system) lines or to a local PBX (private branch exchange).
The STC time division multiplexes digital voice data from codecs or PBX's hooked to as many as 128 phone lines, the STC then merges the data into one serial stream ready to be merged with data coming in from devices such as PCs and printers.
In this way, the STC allows broadband access devices to send and receive one stream of bits with many types of information.
The STC also operates in the reverse manner by taking voice bits from the broadband serial stream, deformatting it and sending it to the codecs attached to the phone lines.
The STC includes four major modules: the DMA controller, high-level data link controller (HDLC), time-slot assigner, and time-division multiplexing (TDM) controller.
All modules provide generic FIFO interfaces, and multiple configurations are available to optimise the architecture for specific system requirements.
Each of these subblocks is highly configurable to allow for a variety of implementations.
The optional DMA controller enables high performance for applications requiring fast access to main memory thus offloading the system CPU.
This block accesses data to and from host memory as a virtual component interface (VCI) master, in accordance with the VSI Alliance industry standard.
The TDM controller is configurable to allow time division multiplexing of as many as 32 calls.
Four TDM modules may be used giving maximum capacity of 128 phone lines.
The HDLC is ISO/IEC 13239 compliant, supporting protocols for ISDN and frame relay.
• inSilicon Corp: contact details and other news
• Email this article to a colleague
• Register for the free Electronicstalk email newsletter
• Electronicstalk Home Page

