IP puts Gigabit Ethernet MAC on chip

The latest addition to the Gigabit Ethernet intellectual property product line from inSilicon Corp is a Gigabit Ethernet MAC subsystem (GMAC subsystem).

The latest addition to the Gigabit Ethernet intellectual property product line from inSilicon Corp is a Gigabit Ethernet MAC subsystem (GMAC subsystem).

At 1Gbit/s operations, the GMAC subsystem serves the higher bandwidth data transfer requirements of high-speed, embedded communication SoC applications, and is backward compatible with the Ethernet standard for 10 and 100Mbit/s operation.

With the continued migration of Gigabit Ethernet from backbone networks to server provider and desktop market segments, designers are looking for Gigabit Ethernet solutions that are cost effective and easily integrated.

The GMAC Subsystem meets those needs, providing the user with all components required to integrate a 10/100/1000 Ethernet port into an SoC.

Built using inSilicon's silicon-proven Gigabit Ethernet MAC (GMAC) intellectual property technology, the GMAC Subsystem supports 10/100Mbit/s and 1Gbit/s datarates, special hardware filtering, VLAN, power management, and remote monitoring.

GMAC also supports jumbo packets and control frames in half- and full-duplex modes.

This product is fully compliant with the IEEE 802.3x standard and provides the interface to IEEE 802.3z-specified (GMII) copper wire PHYs.

GMAC, the major building block of the GMAC Subsystem, has been on the market since last year.

One licensee, Acterna Corporation, a communications test company, licensed the GMAC through inSilicon's authorised design centre partner, Memec Design, for implementation in Xilinx FPGAs.

Licensing the GMAC technology enabled Acterna to complete a first-time working system in less than two months, shortening its time to market and conserving valuable engineering resources.

In addition to inSilicon's GMAC block, the subsystem includes a FIFO layer and a programmable, descriptor-based DMA layer, eliminating the designer's need to develop these components so they can use that time for value-added system development.

To ease system integration, the GMAC subsystem can be easily bridged to any system bus via the VSIA PVCI standard DMA interface.

"Many of our customers require more than a GMAC port, such as additional frame buffers and a DMA engine", said Fawzi Masri, product marketing manager of inSilicon Corporation.

"With our expertise in reusable IP and this feature-rich product, we are providing more value to our SoC customers by reducing their design effort and shortening design time with an integrated and tested Gigabit Ethernet subsystem solution".

Hardware designers receive Verilog RTL source code, Verilog bus functional models, a comprehensive test suite, synthesis scripts, and documentation for integrating the GMAC subsystem into an SoC.

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