Product category:
Intellectual Property Cores
News Release from: Jennic | Subject: Serial RapidIO IP
Edited by the Electronicstalk Editorial
Team on 21 June 2005
Serial RapidIO IP is proven in silicon
Jennic has successfully demonstrated its Serial RapidIO IP operating in conjunction with solutions from other RapidIO vendors.
Jennic has successfully demonstrated its Serial RapidIO IP operating in conjunction with solutions from other RapidIO vendors Jennic has implemented the IP core as a Serial RapidIO to PCI bridge chip which has been instantiated in both an NEC Electronics ISSP structured ASIC and an Altera Stratix-GX FPGA
This article was originally published on Electronicstalk on 27 Jun 2005 at 8.00am (UK)
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Tests undertaken included passing RapidIO traffic between Jennic's IP core and a Freescale PowerQUICC III processor, via a Serial RapidIO switch fabric composed of Tundra Semiconductor's Tsi568A Serial RapidIO switch devices and under the control of Fabric Embedded Tools RapidFET software.
This successfully demonstrates the ability of several RapidIO devices to communicate at the different layers of the RapidIO standard.
In order to participate in this testing, Jennic developed a fully integrated Serial RapidIO evaluation platform consisting of a PCI compliant hardware interoperability platform (HIP) and a comprehensive software package.
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This provided a variety of RapidIO traffic generation and diagnostic capabilities including the ability to compare received data against transmitted data and to control a number of RapidIO parameters.
"The recently performed successful testing with Jennic's IP and our Tsi568A Serial RapidIO switch will enable customers to design their RapidIO-based systems with greater confidence", said Tom Wilson, Director of Product Management at Tundra Semiconductor.
"The availability of silicon proven IP is an important addition to the RapidIO ecosystem and provides customers with an environment to prototype their designs with lower risk and cost".
Frank Newcombe, Business Development Manager for Wireline IP at Jennic added: "By collaborating with the main players in the RapidIO market space, and validating our IP against their standard products, we ensure that our customers' devices will function correctly when used in their intended application".
By offering its Serial RapidIO IP in a range of technologies, including FPGA, structured ASIC and cell-based ASIC, Jennic enables its customers to prototype their systems in a flexible and low cost environment before moving to production volumes.
Jennic's intellectual property portfolio includes physical layer framers and bus bridges for wide and metro area networks, access network coprocessors, line-card connectivity solutions and cellular, low power wireless and data mixed-signal systems.
The company's system expertise, advanced IP portfolio and skills in digital, software, mixed-signal and SoC design combine to deliver performance, cost and time-to-market advantages to its system OEM and semiconductor customers.
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