Product category:
Intellectual Property Cores
News Release from: Jennic | Subject: RapidIO Interface IP
Edited by the Electronicstalk Editorial
Team on 27 June 2005
RapidIO IP available for LSI platform
ASICs
Jennic is to provide its RapidIO Interface IP product line through the LSI Logic RapidChip Platform ASIC Partner Programme.
Jennic is to provide its RapidIO Interface IP product line through the LSI Logic RapidChip Platform ASIC Partner Programme The RapidChip Platform ASIC Partner Programme enables developers to reduce time-to-revenue, design risk and system costs by providing platform ASIC designers with third-party development tools including intellectual property (IP), which is a key component for delivering the value proposition of RapidChip
This article was originally published on Electronicstalk on 21 Jun 2005 at 8.00am (UK)
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"We share a common mission with LSI Logic to enable designer productivity and speed time to market, and we are pleased to be a member of the RapidChip Platform ASIC Partner Programme", said Frank Newcombe, Wireline IP Business Development Manager, Jennic.
"RapidChip is a good match for use with our intellectual property because it provides a low entry cost platform and enables quick time-to-market for our customers' ICs".
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"This allows us to deliver a complete Serial RapidIO solution to quickly create complete system-on-chips efficiently and predictably".
Jennic's RapidIO interface IP product line provides a range of complete, fully integrated RapidIO interface solutions to address a wide range of applications.
Based around a common, modular architecture, the company's solutions implement the physical, transport and logical layer RapidIO standards.
A key benefit of the modular approach is that alternative implementations can be created to support emerging RapidIO standards and to address a customer's specific requirements.
By considering the top-level, system-wide issues from the outset, Jennic has been able to partition the functionality in the most efficient manner possible to address issues such as reusability, silicon resource and key performance parameters such as latency and throughput.
To ensure seamless integration of Jennic's Serial RapidIO IP into LSI Logic's RapidChip Platform ASIC, Jennic has optimised its Serial RapidIO interface IP to comply with the LSI Logic RapidWorx tool flow.
"LSI Logic is pleased to welcome Jennic to the expanding RapidChip Partner IP programme, enabling Serial RapidIO architecture implementations in RapidChip", said Harmel Sangha, Director of CoreWare IP Marketing, LSI Logic Corporation.
"Our RapidChip Platform ASIC Partner Programme is a key component of the technology ecosystem surrounding RapidChip platform ASICs, and the addition of Jennic's industry-leading IP is testament to the growing momentum of available IP solutions for RapidChip technology designs".
"This collaboration between Jennic and LSI Logic, both members of the RapidIO Trade Association, further underscores the vitality of the RapidIO ecosystem", said Iain Scott, Executive Director of the RapidIO Trade Association.
"Close co-operation between member companies is typical of the activities undertaken within the RapidIO Trade Association in order to deliver a multivendor solution to RapidIO adopters and implementers".
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