Spea adds boundary scan to in-circuit tester

Spea and JTAG Technologies have collaborated to integrate JTAG's test methods within the Spea 3030 in-circuit test system.

Spea and JTAG Technologies have collaborated to integrate JTAG's test methods within the Spea 3030 in-circuit test system.

As a result, electronics designers and manufacturers will benefit from even greater testability and programmability of complex PCBs, all within a single process step.

Spea's 3030 polyfunctional test system is already among the most versatile and advanced board testers on the market with comprehensive shorts/opens, analogue, power-up, digital, vectorless and AOI testing options.

With integrated boundary-scan capabilities - powered by JTAG Technologies - users can now further enhance their high-precision digital testing capabilities.

Test development and deployment times are minimised, test coverage is maximised whilst fixture complexity can be reduced due to test-point elimination especially for complex digital PCBs where physical access to electrical nodes is limited.

The JTAG Technologies tools also provide high throughput in-system programming using the DataBlaster family of controllers with clocking speeds of up to 40MHz and support for NOR, NAND and serial Flash parts as well as IEEE1532 CPLD and legacy PLDs.

Andrea Ganio, Executive Director of SPEA, says: "Our customers have asked us to integrate boundary-scan into our products".

"In order to meet this request for high-performance digital testing, we are very pleased to collaborate with JTAG Technologies in offering an integrated solution".

"Customers will gain greater test coverage while maintaining a consistent user interface".

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