Parallel test technology explained

Keithley Instruments has published "Parallel test technology: the new paradigm for parametric testing", a semiconductor parametric test handbook.

Keithley Instruments has published "Parallel test technology: the new paradigm for parametric testing", a semiconductor parametric test handbook.

The 60-page handbook offers an overview of the emerging test technique known as parallel parametric testing, a strategy for wafer-level parametric testing that uses concurrent execution of multiple tests on multiple scribe line test structures and helps semiconductor fabs maximise their test throughput and reduce their cost of test.

The handbook is available for no charge from Keithley, and covers: the basics of parallel parametric test; the parallel test implementation process; applying parallel parametric test to existing hardware setups; and test structure design for parallel testing.

The handbook also contains a section with sample programming code for a typical parallel test setup using pt_execute, and a glossary of common parallel parametric test terminology.

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