Product category:
Programmable Logic Devices
News Release from: Lattice Semiconductor UK | Subject: ispMACH 4032Z
Edited by the Electronicstalk Editorial
Team on 23 January 2003
In-system programmable devices come to
handhelds
Lattice Semiconductor reckons its 1.8V ispMACH 4000Z CPLD family that sets a new standard for the industry's lowest static power consumption.
Lattice Semiconductor reckons its 1.8V ispMACH 4000Z CPLD family that sets a new standard for the industry's lowest static power consumption The ispMACH 4032Z device is the first of three initial ispMACH 4000Z devices which span logic capacities from 32 to 128 macrocells
This article was originally published on Electronicstalk on 23 Mar 2001 at 8.00am (UK)
Related stories
Big, fast and wide PLDs in full production
Lattice Semiconductor has announced the completion of the production release of its second-generation SuperFAST BFW (Big-Fast-Wide) family, the ispLSI 2000VE family.
Analogue front end is dynamically reconfigurable
Lattice Semiconductor has added a new member to its ispPAC programmable analogue device family.
These breakthrough devices provide extremely low static current consumption (20uA worst case for a 32 macrocell device) and cost effective logic implementation demanded by handheld and portable applications.
By reducing static power consumption to only 20% of previous devices, the new family dramatically expands the application scope of programmable logic in the portable and handheld arenas and provides new programmable solutions within the $6.9 billion portable consumer semiconductor market as well as other power-conscious segments.
These ultra-low-power features are also coupled with high-speed operation: the ispMACH 4032Z device provides 3.5ns pin-to-pin delay, 3.0ns clock-to-output delay, 2.2ns set-up time and 265MHz operating frequencies.
Further reading
Software programs analogue devices
Lattice Semiconductor has announced manufacturing software support for its revolutionary ispPAC in-system programmable analogue circuit family of devices.
Bigger CPLDs come onstream
Lattice Semiconductor has announced the immediate availability of the first device in its ispMACH 5000VG SuperBIG CPLD family, the 1024-macrocell ispMACH 51024VG.
In-system reprogrammable 5th-order lowpass filter
Lattice Semiconductor has added to its ispPAC programmable analogue device family with the ispPAC81 in-system programmable continuous time filter.
Traditionally, requirements for low standby power and low cost have limited the use of PLDs in handheld and portable equipment.
"The ispMACH 4000Z combines the industry's lowest static power with an extremely cost effective solution", said Stan Kopec, Lattice Vice President of Corporate Marketing.
"It is suitable for a wide variety of handheld, portable, and consumer products.
At only one-fifth the power consumption of current low-power CPLDs, it will dramatically expand the applications that programmable logic can address within these markets".
The ispMACH 4000Z is aimed at applications including cell phones and peripherals, paging devices, GPS positioning equipment, PDAs, digital still camera's, digital video camera's, personal audio equipment, portable medical equipment, automotive telematics and radio, and industrial instrumentation.
Standby time is a key design requirement for portable and handheld equipment.
Designers want to minimise the standby or static power associated with logic within their designs to maximise the interval between battery charges or replacement.
In designing the ispMACH 4000Z, Lattice took its popular ispMACH 4000 architecture, reoptimised its nonvolatile E2CMOS process technology and redesigned key circuit elements to reduce static power by over a factor of 50.
As a result, the maximum static current consumption for devices in the family ranges from 20 to 30uA over the commercial operating temperature range, while still maintaining the industry's fastest performance for a low-power CPLD solution.
The ispMACH 4000Z operates from a nominal 1.8V power supply with operation extended down to 1.5V, accommodating the end of battery life voltage of certain systems.
The ispMACH 4000Z devices have two I/O banks, each with their own power supply voltage that can be set at the appropriate voltage to support LVTTL and LVCMOS 3.3, 2.5 and 1.8V outputs.
The device input buffers have programmable thresholds that support the above standards independent of the I/O bank voltage.
Extended range 3.3V I/O are supported instead of the more common narrow range version of the standard, again accommodating the end of battery life voltages associated with certain systems.
The I/Os on the ispMACH 4000Z are 5V tolerant to also facilitate connection to legacy chips and interfaces All ispMACH 4000Z devices are boundary scan testable and in-system programmable through an IEEE1532-compliant JTAG boundary scan (IEEE1149.1) interface.
The ispMACH 4000 product line is supported by Lattice's new ispLever design tools.
The ispLever tools, Lattice's platform for next-generation logic design, provide designers with rapid access to the performance of the ispMACH 4000Z devices while maximising resource utilisation.
This is achieved through timing driven placement and routing coupled with optimised synthesis support from vendors such as Exemplar and Synplicity.
Additional third-party EDA tool support is provided through industry standard EDIF netlist import and export.
The ispLever software is available in PC as well as UNIX workstation versions.
The ispMACH 4032Z is available now in 48-pin TQFP and space-saving 0.8mm ball pitch 49-ball chip array ball grid array (caBGA) packages in commercial, industrial and automotive temperature options.
These small PCB-footprint packages, with body sizes only 7mm square, are supported to satisfy the tight space constraints often found with portable and handheld equipment.
The ispMACH 4000Z family also supports system designers' needs for density migration within a common package/pinout footprint.
ispMACH 4000Z devices are also pin-compatible with ispMACH 4000C devices in corresponding packages.
The balance of the ispMACH 4000Z devices are expected to be released mid-2003.
Projected pricing for the ispMACH 4032Z is less than $1.00 in 100,000 piece quantities.
(This was Electronicstalk's Top Story on 22 January 2003).
• Lattice Semiconductor UK: contact details and other news
• Email this article to a colleague
• Register for the free Electronicstalk email newsletter
• Electronicstalk Home Page
Search the Pro-Talk network of sites
