Approved cores speed programmable system design

The ispLeverCore Connection marks a new level of collaboration between Lattice and independent developers of intellectual property.

The ispLeverCore Connection marks a new level of collaboration between Lattice and independent developers of IP to expand both the market reach of the partners, and the applications support for leading FPGA and field programmable system chip (FPSC) devices from Lattice.

The ispLeverCore Connection is a partner programme designed to allow customers to easily access and integrate many 3rd-party IP products on Lattice programmable devices.

To facilitate this, all Connection Cores are delivered as a complete package including all documentation and meet the "ispLeverCore Approved" requirements.

Lattice also makes it easy for 3rd-party developers to optimise and implement their IP cores on Lattice's leading device families, such as ispXPGA and Orca Series 4 FPGAs and FPSCs.

The Connection partners receive complete training on Lattice device architectures and the ispLever design tool suite that is used for the IP implementation and optimisation.

The initial three partners in the ispLeverCore Connection are Cast, Digital Core Design (DCD) and Eureka Technology.

Each partner provides a broad line of reusable IP cores, support, and design services.

They have extensive system knowledge and products covering a wide range of application areas such as storage, imaging, DSP, encryption, MCU/MPU and more.

These three partner companies have a combined portfolio of over 140 different IP cores that are complementary to Lattice's own line of ispLeverCore products.

The initial three partners were selected for their leadership position as dedicated IP providers, their longevity and proven success with customers, and their commitment to quality and support.

"Our new IP partners are a very welcome addition.

Bringing their experience and proven IP cores to our devices, these respected partners increase the IP options available to our customers, helping speed their time to market", said Stan Kopec, Lattice Vice President of Corporate Marketing.

At launch, the Connection partners have implemented over 35 flagship IP cores for multiple Lattice devices (a total of 70 new products).

These IP cores are shown both on the Lattice website and on the partners' websites.

The initial Connection Cores include microprocessors, maths building blocks, UARTs and bus interfaces.

Connection Cores have been extensively tested and in most cases have a history of successful customer usage.

The complete packages for approved Connection Cores include: source code, netlist or bitstream for implementation; constraints or preferences files; testbenches for simulation; documentation including ispLeverCore Connection datasheets; other supporting files such as scripts, wrappers etc.

Connection Cores are available in netlist format for immediate purchase from the Connection partner.

Connection partners also offer a variety of additional packaging and licensing options to suit customer's specific needs.

By leveraging partner products, customers can quickly implement a wide variety of functions in Lattice programmable devices.

ispLeverCore Connection partners are also available for custom IP design work for customers who are implementing programmable solutions using Lattice devices.

All Connection Cores are reviewed to determine that they have met Lattice's recommended IP tool flow and high-quality standards.

Connection partners certify to Lattice that cores have been successfully implemented with Lattice's ispLever suite of implementation tools and third-party EDA tools.

The Connection partner also certifies that the core has been thoroughly tested to comply with the functional and performance requirements of applicable industry specifications.

Lattice reviews each Connection Core for proper development methodology, and package completeness.

Performance and fit on the Lattice device are also reviewed as appropriate for that particular device and speed grade.

The "ispLeverCore Approved" logo will appear on all Connection Cores.

The ispLeverCore programme provides functional building blocks that help designers minimise the effort of complex designs, significantly reducing time-to-market and cost.

In addition to the Connection partners, there are two further elements to the ispLeverCore programme.

Lattice Reference Designs provide easy to understand starting points with source code or netlist for high performance designs, supporting common functions such as 8B/10B, PCI target, SDRAM controllers and boundary scan interfaces.

Lattice's ispLeverCores provide dozens of IP cores developed and supported by Lattice implementing functions such as PCI, Ethernet, POS PHY3, Utopia3 and forward error correction.

Many of these cores can be evaluated and purchased directly from the Lattice website.

Back to top