Product category:
Programmable Logic Devices
News Release from: Lattice Semiconductor UK | Subject: LatticeECP20 and LatticeEC20
Edited by the Electronicstalk Editorial
Team on 18 October 2004
Low-cost FPGAs hit production on
schedule
The first members of the LatticeECP-DSP and LatticeEC FPGA device families are now available in production quantities.
The first members of the LatticeECP-DSP and LatticeEC FPGA device families are now available in production quantities Production-tested and qualified, the 20K lookup-table (LUT) ECP20 and EC20 devices are now shipping
This article was originally published on Electronicstalk on 23 Mar 2001 at 8.00am (UK)
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The ECP-DSP20 and EC20 devices feature pre-engineered 400Mbit/s DDR memory interfaces, the only low-cost FPGAs in the market to achieve this performance level.
The devices can be configured using low-cost, multisourced SPI Flash memory.
The ECP-DSP20 also features seven sysDSP blocks capable of implementing up to 28 18x18 multipliers with dedicated accumulator and pipelining logic for extra speed and density.
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The LatticeECP and LatticeEC devices are implemented on a cost-effective, production-proven, low-k, 130nm CMOS process with copper metallisation fabricated by Fujitsu.
This process technology, combined with efficient silicon design, results in very small die sizes while providing the new Lattice FPGAs with the most attractive feature sets in their class.
Lattice first described its LatticeECP/EC product families in March 2004, and announced the devices in detail in June 2004.
"We publicly committed to deliver the first samples of the LatticeECP and LatticeEC families to the marketplace in the third quarter, and we made our first customer shipment in August", said Stan Kopec, Lattice Vice President of Corporate Marketing.
"We have now moved into full production as a result of excellent execution by our entire organisation and our newest foundry partner, Fujitsu Limited".
"Lattice announces its products when we can firmly commit samples to our customers within weeks, not months or years".
"We are convinced that customers are well served only when real products are available in real time", Kopec added.
Remaining LatticeECP and LatticeEC devices are expected to sample over the next three months, with production release scheduled in the first quarter of 2005.
Lattice has also expanded its LatticeECP and LatticeEC FPGA families with the addition of 33K LUT devices.
The LatticeECP33 and LatticeEC33 FPGAs provide optimal support for customers whose requirements fall between the previously announced 20K LUT and 40K LUT devices.
"The LatticeECP and LatticeEC product families have to a large degree been designed by our customers", Kopec said.
"When they told us they needed a device between 20K and 40K LUTs, we responded quickly".
The LatticeECP-DSP and LatticeEC FPGA device families are architected to provide the most optimised feature sets combined with the lowest total solution costs of any FPGAs.
The new LatticeECP-DSP products, targeted for high-performance DSP applications, provide up to a 50% performance and 75% logic utilisation improvement over other low-cost solutions when implementing common DSP functions.
The LatticeEC FPGA product family, targeted for general-purpose FPGA applications, is a precise and targeted response to the market's explosive demand for low-cost, architecturally streamlined logic solutions.
Through advanced 130nm silicon technology, an optimised architecture and proprietary circuit design, the new Lattice devices lower total solution costs by up to 30-50% compared with existing FPGA solutions, and are expected to broaden the adoption of FPGAs within the $20 billion ASIC marketplace.
Design support for the LatticeECP-DSP and LatticeEC devices is provided by Lattice's next-generation software suite of design tools, ispLever version 4.1.
These ispLever design tools provide designers with access, in one software package, to all Lattice digital devices and include synthesis support from Mentor Graphics and Synplicity.
An extensive range of IP (intellectual property) cores, particularly suited for high-volume applications, will be available from both Lattice and its IP partners.
Complete details of IP support are being announced separately throughout 2004.
The ECP-DSP20 and EC20 devices are available now in 484-ball fpBGA and 672-ball fpBGA packages in commercial and industrial temperature range options.
The LatticeECP and LatticeEC families are available in low-cost packaging options supporting a pin-compatible footprint throughout the family for easy density migration.
Current pricing in 1000 piece quantities for the LatticeECP20 and LatticeEC20 starts at $53 and $44, respectively.
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