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Product category: Intellectual Property Cores
News Release from: Lattice Semiconductor UK | Subject: ispLeverCore
Edited by the Electronicstalk Editorial Team on 20 October 2004

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Lattice Semiconductor has released a number of key ispLeverCore intellectual property (IP) modules for its recently announced LatticeECP-DSP and LatticeEC FPGAs.

Lattice Semiconductor has released a number of key ispLeverCore intellectual property (IP) modules for its recently announced LatticeECP-DSP and LatticeEC FPGAs The initial IP modules available allow users to rapidly complete designs for functions as diverse as Ethernet, Reed Solomon, PCI and DMA

These modules, along with others that will become available over the coming months, complement the ispLeverCore Connection IP cores available from Lattice's third party partners, as well as Lattice's free, industry-standard reference designs.

"Lattice is excited to provide designers the unbeatable combination of its next-generation ECP and EC FPGA devices and a comprehensive library of IP modules that allows them to quickly design a variety of the most popular application functions", said Stan Kopec, Lattice Vice President of Corporate Marketing.

"Effective design tools and IP are now as integral to successful programmable logic design as silicon".

"Our ispLever Core modules are designed to the highest coding standards, and are extensively tested to meet required functionality and performance".

"These cores are ready-to-use, well-documented, and fully supported by Lattice field and factory engineers", Kopec concluded.

The Lattice ispLeverCore IP products represent a range of rigorously designed and verified solutions that implement standardised functions commonly used in FPGA designs.

Evaluation netlists, which allow the IP to be combined and simulated with the user's logic, can be downloaded for free from Lattice's website.

IP cores for the LatticeECP and LatticeEC devices that are currently available for download include: 10/100 Ethernet MAC; 1G Ethernet MAC; PCI; multichannel DMA controller; Reed Solomon encoder and Reed Solomon decoder; block convolutional encoder; and turbo encoder.

Additional IP modules that Lattice intends to make available for its ECP and EC devices include DDR memory controller, FCRAM memory controller, Viterbi decoder, turbo decoder, and numerically controlled oscillator.

For its LatticeECP-DSP devices, Lattice is developing a range of DSP-oriented IP that uses the sysDSP blocks embedded in the device.

IPs that Lattice intends to make available include popular functions such as finite impulse response (FIR) filters and fast Fourier transforms (FFTs).

In addition to ispLeverCore IPs, the Lattice website includes details of IP cores for the LatticeECP and LatticeEC FPGAs available from Lattice's ispLeverCore Connection partners: Cast, Digital Core Design (DCD) and Eureka Technology.

The Lattice partners programme is designed to allow customers to easily access and integrate approved third-party IP products using Lattice programmable devices.

"Partner IP support for our new FPGA families continues to grow rapidly", said Kopec.

"We're pleased to continue our partnerships with Cast, DCD and Eureka Technology, and very excited by the increased IP core performance that each has achieved using our new ispLever design tool software".

Cast IP cores for the LatticeECP and LatticeEC devices include CANbus and 1394a functions.

DCD provides a variety of microprocessor and peripheral functions, including 8051 and PIC compatible microprocessors.

Eureka Technology provides a variety of bus interface functions and a CompactFlash/PCMCIA host adapter IP.

Lattice also has free reference designs now available for the LatticeECP and LatticeEC devices to support functions including: QDR II SDRAM controller; SDR SDRAM controller; I2C bus master controller; 1553 databus encoder/decoder; and RGMII bridge.

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