Product category:
Programmable Logic Devices
News Release from: Lattice Semiconductor UK | Subject: ispClock5500
Edited by the Electronicstalk Editorial
Team on 26 October 2004
Award for programmable clock devices
The Editors and readers of EE Times have selected the ispClock5500 as an "ultimate product".
The Editors and readers of EE Times have selected the ispClock5500 as an "ultimate product" The ispClock device was the only product among 70 nominated to be recognised in more than one category
This article was originally published on Electronicstalk on 23 Mar 2001 at 8.00am (UK)
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According to EE Times Executive Editor Marty Gold: "Our expert editors select ten of the most significant products introduced during the quarter - in each of seven categories - and then, using an electronic balloting mechanism, we submit these products to selected, qualified readers of EE Times and eeProductCenter".
"Readers rate these products on 'technical significance' and 'likelihood of use'".
Gold added that over 1300 readers participated.
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Readers were also invited to submit comments with their votes.
"I look forward to using these in my next design to simplify the current tangled web of clocks and logic", wrote one reader.
Another reader observed: "Unprecedented convenience in designing clock networks".
Yet another noted: "Programmable skew can reduce overall PCB costs by eliminating serpentine trace layouts and possible noise".
Another reader echoed that view: "By using this product, we will simplify the design and save space on the PCB".
"Recognition of our programmable mixed signal ispClock product by the Editors and readers of EE Times is extremely gratifying", said Stan Kopec, Lattice Vice President of Marketing.
"Most importantly, the unique capabilities of these products are generating widespread interest and early design success with our customers".
"To be voted an ultimate product in both the analogue IC and programmable logic categories speaks to both the technical importance and versatility of the ispClock devices".
The ispClock5500 family, composed of the 10-output ispClock5510 and 20-output ispClock5520, combines a high- performance clock generator with a flexible, universal fanout buffer.
The on-chip clock generator can provide up to five clock frequencies, ranging from 10 to 320MHz, using a high-performance PLL and clock multiply and divide facilities.
The universal fanout buffer can drive up to 20 clock nets using either single-ended or differential signalling, with individual output control for improved signal and timing integrity.
Traditional clock chips essentially provide single point solutions for a portion of a clock network.
Designers, for each clock network, must consequently select different clock devices from a wide variety of clock chips from different manufacturers.
Once the devices are selected, designers must then use external resistors to match the clock network trace impedances with the clock driver output impedance, and use snaking circuit board patterns to match the clock network trace lengths.
In contrast, the ispClock devices not only integrate the functionality of a wide variety of clock devices such as clock generators, fan-out buffers, translators and zero-delay buffers, but they also support programmable features that compensate for differences in clock network trace impedances and trace lengths.
Ultimately, the unique features of the ispClock devices provide a number of very tangible benefits to their users; reduced time-to-market and risk reduction derived from their in-system programmable approach that supports precise clock tuning, even after the devices are soldered onto the printed circuit board (PCB); reduced PCB size and cost through their high integration; enhanced manufacturing and end-use flexibility through multiple configuration profiles stored on the device and improved system reliability and performance through precision frequency and skew control.
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