Product category:
Design and Development Software
News Release from: Lattice Semiconductor UK | Subject: IspLever-Starter 5.0
Edited by the Electronicstalk Editorial
Team on 25 May 2005
Upgrade for free programmable logic
software
The upgraded ispLever-Starter 5.0 design tools can now be downloaded from the Lattice website.
The upgraded ispLever-Starter 5.0 design tools can now be downloaded from the Lattice website ispLever-Starter 5.0 is offered free of charge in order to encourage easy evaluation of Lattice's recently announced ispLever 5.0 programmable logic design tool suite
This article was originally published on Electronicstalk on 23 Mar 2001 at 8.00am (UK)
Related stories
Big, fast and wide PLDs in full production
Lattice Semiconductor has announced the completion of the production release of its second-generation SuperFAST BFW (Big-Fast-Wide) family, the ispLSI 2000VE family.
ispLever-Starter 5.0 uses the same interface and design flow as ispLever 5.0, and can be used to take a design from concept to device programming.
Like previous ispLever-Starter design tools, ispLever-Starter 5.0 supports all Lattice ispXPGA FPGAs, CPLDs, ispGDX and SPLD devices.
The PC-based ispLever-Starter 5.0 tools also now include design support for all low cost LatticeEC FPGAs as well as the LatticeECP-DSP6 device.
This expanded design support gives users unprecedented access to Lattice's newest low cost FPGAs.
"The LatticeEC family, with seven family members ranging in density from 1.5K to 33K LUTs, is being used in designs around the world", said Stan Kopec, Lattice Vice President of Corporate Marketing.
"With design support for the entire product line so accessible, every design engineer worldwide will be able to evaluate our technology and its advantages first-hand".
• Lattice Semiconductor UK: contact details and other news
• Email this article to a colleague
• Register for the free Electronicstalk email newsletter
• Electronicstalk Home Page
Search the Pro-Talk network of sites
