Product category:
Programmable Logic Devices
News Release from: Lattice Semiconductor UK | Subject: LatticeSC15/25
Edited by the Electronicstalk Editorial
Team on 26 January 2007
Extreme performance FPGAs enter volume
production
The first members of the Lattice Semiconductor Extreme Performance LatticeSC and LatticeSC/M FPGA families have been fully qualified and released to volume production.
The first members of the Lattice Semiconductor Extreme Performance LatticeSC and LatticeSC/M FPGA families have been fully qualified and released to volume production The Extreme Performance LatticeSC/M devices are designed to provide the unsurpassed performance and connectivity essential for high-speed system applications
This article was originally published on Electronicstalk on 23 Mar 2001 at 8.00am (UK)
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Fabricated on leading-edge 90nm CMOS process technology utilising 300mm wafers, LatticeSC/M FPGAs are packed with features that accelerate chip-to-chip, chip-to-memory, high-speed serial, backplane and network data path connectivity.
The first FPGAs released to production include the 15K look-up-table (LUT) LatticeSC/M15 and 25K LUT LatticeSC/M25 devices in the 900-ball fine pitch BGA (fpBGA) package, as well as the LatticeSC/M15 in the footprint-efficient 256-ball fpBGA package.
Other LatticeSC/M device densities and package configurations are expected to be released over the coming months as they are qualified and fully characterised.
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"The LatticeSC family provides a unique FPGA platform that we use to address a broad range of 40G interface solutions".
"In particular, the devices' I/O capabilities and embedded ASIC blocks provide an exceptional level of performance and integration", said Robert Smedley, Vice President of Systems Development at Bay Microsystems, a leading supplier of cutting-edge network processor products.
"Using the LatticeSC family, Bay has implemented extremely cost effective, flexible interface solutions that work alongside Chesapeake, the industry's highest performance network processor".
"Lattice's approach is to announce new silicon products when we have working silicon in hand, so our customers have real devices for evaluation, but not so far in advance that they must wait interminably for production quantities", said Stan Kopec, Corporate Vice President of Marketing.
"The LatticeSC/M family has been enthusiastically received in the marketplace, and we are winning significant new design-ins and mindshare with customers based on the tangible advantages and ease-of-use of our technology".
"Our customers appreciate the fact that production release of the LatticeSC/M devices comes less than one year from our initial product announcement".
Simultaneously, Lattice also has announced its FreedomChip customer specific cost reduction methodology for its Extreme Performance LatticeSC/M FPGA families.
Customers can reduce the price of selected high volume LatticeSC/M FPGA designs from 30% to 75% by converting to the pin compatible Lattice FreedomChip device with a fully integrated, seamless design methodology.
Integrated into the LatticeSC/M devices are high-channel-count serdes blocks supporting 3.8Gbit/s datarates, Purespeed parallel I/O providing industry-leading 2Gbit/s speed, innovative clock management structures, FPGA logic operating at 500MHz and massive amounts of block RAM.
Lattice's unique Masked Array for Cost Optimisation (MACO) embedded structured ASIC blocks also are available on the LatticeSCM devices, delivering pre-engineered, standard-compliant IP functions such as SPI4.2, Ethernet MAC and PCI Express control functions developed by Lattice to shorten end-system time to market.
Production-qualified versions of the LatticeSC15 and LatticeSCM15 in the 256- and 900-ball fpBGA packages, as well as the LatticeSC25 and LatticeSCM25 in the 900-ball fpBGA package, are now available.
Prices for the LartticeSC15 in the 256-ball fpBGA package start at US $25 for 25,000 pieces shipping in 2007.
Prices for the LatticeSC25 in the 900-ball fpBGA package for similar volumes start at $49.
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