IP library runs on 90nm embedded Flash FPGAs

Lattice Semiconductor has made available 45 ispLeverCore intellectual property and third-party vendor IP cores for its new 90nm embedded Flash LatticeXP2 FPGA family.

Lattice Semiconductor has made available 45 ispLeverCore intellectual property (IP) and third-party vendor IP cores for its new 90nm embedded Flash LatticeXP2 FPGA family.

Lattice and its ispLeverCore Connection partners - Cast, Anagram Technologies, DCD, Eureka Technology and WDC - have already ported a wide range of cores addressing automotive, communications, consumer, embedded, instrumentation, video and wireless applications to the LatticeXP2 architecture.

"Our goal is to provide 'more of the best' IP solutions for every device family at product introduction".

"Our new 90nm LatticeXP2 family provides a third generation nonvolatile FPGA platform for Lattice and its IP partners so we can deliver even more value-added solutions to our mutual customers", says Stan Kopec, Corporate Vice President of Marketing.

"The wide range of third-party cores available builds on the unique value of the LatticeXP2 devices and creates tremendous mutual opportunities for Lattice and our partners".

"The exciting new LatticeXP2 devices are like our cores - lean and efficient, yet packed with functionality and ready to work right away", says Hal Barbour, President of Cast.

"We're pleased to offer the first configurable 8051 core for the LatticeXP2 family, and are rapidly porting many of our 100-plus cores to the new technology".

"Once again Lattice is at the leading edge of the on-going trend toward reconfigurable, fully integrated architectures that offer attractive benefits in terms of power consumption, cost and time to market", says Tim Llewellyn, Vice President of Sales and Marketing for Anagram Technologies.

"By adding DSP capabilities to the LatticeXP2 devices, customers can now benefit from our SoftAMP Class D PWM amplifier and SoftDAC 24bit audio DAC IP running on the industry's most integrated reprogrammable devices".

"We have developed hundreds of IP cores across different platforms".

"Migrating our IP to the LatticeXP2 devices was one of the easiest transitions we have experienced", says Simon Lau, President of Eureka Technology.

"We were able to achieve maximum performance with minimal effort".

"All of Eureka's IP cores support the LatticeXP2 FPGA family".

"We are very excited to have an opportunity to work with the new LatticeXP2 technology and have already been working with customers using DCD's IP cores inside these chips", says Tomek Krzyzak, Vice President of IP Development at DCD.

"The most popular of DCD's products in Lattice's ispLeverCore Connection programme have already been ported to the LatticeXP2 devices with great success".

"Our LatticeXP2 implementation of the 65xxx microprocessor IP provides a flexible, instant-on emulation of our ASIC hard cores".

"Users can use this for prototyping, or stay with the low-cost LatticeXP2 devices into production", says David Gray of Western Design centre.

"The legendary flexibility of the 65xxx secures a wide breadth of applications not available with other 8bit cost effective processor families".

"The LatticeXP2 devices showcase this".

Lattice-developed ispLeverCore IP cores for the LatticeXP2 family are supported by the recently released version 7.0 of the ispLever design tool suite via Lattice's IPexpress flow, included as a standard feature in the ispLever software.

Lattice's ispLeverCore modules are optimised for use with Lattice devices.

The modules are large, modular design blocks, commonly known as intellectual property (IP) cores, which can be reused and easily placed within a programmable logic design.

ispLeverCore IP cores are configured for specific customer applications via the IPexpress module included within the ispLever tool.

The IPexpress flow allows customers to parameterise IP on their desktop, incorporate the IP within their designs and evaluate the resulting design within their hardware before committing to purchase an IP license.

The modules are designed using the highest coding standards and are extensively tested to meet the required functionality and performance.

These cores are ready-to-use, well documented and supported by Lattice field and factory engineers.

The ispLeverCore Connection is a global organisation of independent IP providers who have teamed with Lattice to bring its customers the highest quality, reusable IP cores optimised for Lattice's unique portfolio of FPGA devices.

All Connection partners are selected for their industry leadership, high development standards and commitment to customer support.

Lattice works closely with each Connection partner to ensure they have all the proper tools and training to maximise their cores' performance in Lattice's software and devices.

Connection partners provide many widely used cores that are complementary to Lattice's own line of ispLeverCore products.

The ispLeverCore Connection cores have been extensively tested and have a history of successful customer use.

The LatticeXP2 family combines a look-up table (LUT)-based FPGA fabric with Flash nonvolatile cells on a 90nm process technology, in an architecture called flexiFlash.

The flexiFlash approach provides benefits such as instant-on operation, a small footprint, on-chip storage with FlashBAK embedded block memories, serial TAG memory and the highest design security.

LatticeXP2 devices also support live updates with Lattice's unique TransFR technology, 128bit AES design encryption and dual-boot technologies.

The family provides five devices ranging between 5K and 40K LUTs in a wide variety of packages.

All Lattice-developed ispLeverCore IP modules are supported by the IPexpress design flow within ispLever version 7.0, available now.

User Guides for these IP modules can be found on the Lattice website.

Lattice's comprehensive ispLever design software, providing support for all Lattice CPLDs and FPGAs, including IPexpress support, is priced at a low US $695 for a complete Windows-based seat.

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