Product category:
Design and Development Hardware
News Release from: Lauterbach | Subject: Trace32 PowerTools
Edited by the Electronicstalk Editorial
Team on 22 October 2004
Emulators gain cache analysis
capabilities
Lauterbach will demonstrate its new method for cache analysis at Electronica 2004, allowing users of the Trace32 PowerTools product line to optimise the cache-hit rate of their applications.
Lauterbach will demonstrate its new method for cache analysis at Electronica 2004, allowing users of the Trace32 PowerTools product line to optimise the cache-hit rate of their applications An optimised cache-hit rate guarantees high-standard performance of embedded systems and also reduces the power consumption of low-power designs
This article was originally published on Electronicstalk on 8 Dec 2004 at 8.00am (UK)
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Debuggers support NEC microcontroller families
Lauterbach Trace32 ICD and Trace32 PowerTools debuggers now support the NEC V850E and V850ES microcontroller families.
Lauterbach's cache analysis method provides a fast and logical way to detect runtime losses that are caused when memory is accessed.
To perform a cache analysis,Trace32 needs detailed information about the cache organisation and sufficient recording times of program and data flow in the trace memory.
Based on this information, the system supplies an accurate list of cache-hit and cache-miss rates, as well as cache victims.
The results of the analysis can be clearly displayed using the individual cache lines, memory locations, functions, and variables.
This makes it easy to identify which sections of code or data areas have to be relocated to different addresses to improve the cache-hit rate over the long term.
Using the same procedure, the result of this type of relocation can be easily verified.
Cache analysis has already been fully implemented for the ARM9 family.
This method naturally also supports all complex memory structures such as memory protection units and memory management units.
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