Product category:
Design and Development Software
News Release from: LSI Europe | Subject: RapidWorx 4.0
Edited by the Electronicstalk Editorial
Team on 10 February 2006
Software streamlines platform ASIC
design
An enhanced design tool aims to significantly reduce the obstacles to designing high-performance custom silicon.
Improving time to revenue for RapidChip platform ASIC designs, RapidWorx 4.0 is an enhanced design tool that significantly reduces the obstacles of designing high-performance custom silicon Combining seamless design flow, rule-based and automatic methodology, and correct-by-construction tools, the RapidWorx 4.0 cockpit invokes a new integrated "Manager" tool suite
This article was originally published on Electronicstalk on 23 May 2001 at 8.00am (UK)
Related stories
ANT Fresco browser ported to LSI set-top box SoC
Available now from LSI Logic is the company's software development platform (SDP) for the SC2000 digital set-top box (STB) chip featuring ANT's embedded Fresco browser.
SCSI technology enters the seventh generation
LSI Logic has announced commercial availability of the LSI53C1030 Ultra320 SCSI controller chip and the start of a worldwide product sampling and demo program featuring LSI Logic's Ultra320 products.
The RapidWorx design kit consists of the clock, I/O, IP and memory manager.
Features in the I/O manager help users take full advantage of the RapidChip configurable I/Os and the new memory manager provides flexible and highly configurable options for RapidChip platform ASIC designers.
For the first time, customers have the option of using a clock manager that supports multiple modes, while gaining enhanced viewing capability and significantly increased clock structure capabilities.
When customers launch the IP manager, a comprehensive list of RapidChip-specific intellectual property is made available.
IP manager seamlessly assigns the appropriate memory and I/O resources for the design.
Using RapidWorx, customers can quickly accomplish placed netlist handoff, allowing an accelerated design cycle.
"LSI Logic continues its commitment to reduce design risk and shorten design cycle time by delivering greater capability in our RapidWorx design kit", said Ken Mikami, Marketing Director, RapidChip Tools and Methodology, LSI Logic.
"This new design kit also offers RapidChip designers greater ease of use to accelerate time to market".
The RapidWorx design kit contains five main tools: floorplanning of the RapidChip slice, physical mapping of these slices, RTL rule checking with physical RTL analysis, physical synthesis with placement optimisation and netlist handoff rule checking.
Each tool is launched within the main RapidWorx cockpit.
Cross probing is enabled between tools, allowing users to trace signals through different views in the design.
• LSI Europe: contact details and other news
• Email this article to a colleague
• Register for the free Electronicstalk email newsletter
• Electronicstalk Home Page
Search the Pro-Talk network of sites
