Product category:
Design and Development Software
News Release from: Magma Design Automation | Subject: Blast Create, Blast Fusion and Blast Noise
Edited by the Electronicstalk Editorial
Team on 28 October 2005
RTL-to-GDSII flow speeds 65nm serdes to
market
Next-generation serdes vendor Aeluros has successfully taped out a 65nm high-density low-power IC using Blast Create, Blast Fusion and Blast Noise.
Next-generation serdes vendor Aeluros has successfully taped out a 65nm high-density low-power IC using Blast Create, Blast Fusion and Blast Noise The IC is a high-performance, analogue-intensive, 5Gbit/s chip that was completed in less than three months
This article was originally published on Electronicstalk on 20 Sep 2005 at 8.00am (UK)
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Magma's RTL-to-GDSII flow enabled Aeluros to address 65nm design challenges and achieve timing signoff for both the digital logic and analogue interface portions of the design within a single environment - thereby reducing the design cycle.
"We selected Magma for our first 65nm design after achieving first-pass silicon success on a number of 0.13um designs", said Don Stark, Vice President of Engineering at Aeluros.
"We needed to establish a reliable flow that could handle custom analogue blocks along with standard-cell-based digital ASIC design".
Further reading
Integrated flow cuts down image processor design
NuCore Technology, maker of the award-winning CleanCapture image processors, has standardised on Magma's RTL-to-GDSII design flow, including Blast Create and Blast Fusion.
Integrated design flow enhances design services
eInfochips has strengthened its IC design and verification capabilities by adopting Blast Create, Blast Fusion, Blast Power, Blast Rail and Blast Noise software.
"Magma's easy-to-use Tcl interface and automated flow allowed us quickly to repeat the entire design process every time we made a change to the RTL or constraints".
"This was key to helping us achieve the performance we needed without having to add engineering resources".
"Magma is committed to delivering software and methodologies that minimise the risk of migrating to 65nm and below", said Premal Buch, General Manager of the Design Implementation Business Unit at Magma.
"We're pleased that Blast Create and Blast Fusion have once again been proven to address the complexities that arise in subnanometre design".
A combination of 65nm process technology and ASIC and custom designed analogue circuits, the design presented several potentially time-consuming challenges.
The Magma software was able to improve productivity and accelerate the design cycle.
The Magma Tcl interface enabled the designers to implement the entire RTL-to-GDSII flow with a single script and simplified the process of incorporating abstracts of the analogue blocks into the design.
With early silicon performance (ESP) reports generated by Blast Create the designers could quickly and accurately predict how their RTL and constraint changes would affect timing.
The Blast Noise correct-by-construction noise optimisation flow enabled rapid closure of noise issues without iterations.
Magma's integrated flow provided timing signoff for both digital logic and analogue circuits.
This eliminated the time-consuming circuit simulation of analogue-digital, mixed-signal interfaces and simplified back-end timing verification.
With Blast Fusion, the designers implemented the mixed-signal IP using an ASIC flow, avoiding the complications of a custom flow.
The physical design tool's powerful, automated routing capabilities quickly and efficiently routed the thousands of nets in the design.
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