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News Release from: Mentor Graphics UK | Subject: FPGA OpenMORE
Edited by the Electronicstalk Editorial
Team on 23 March 2001
Program makes better use of IP in FPGAs
Mentor Graphics and Xilinx have released FPGA OpenMORE, a reference assessment program and spreadsheet for evaluating the reusability of IP in large, multi-million-gate FPGA designs.
Mentor Graphics and Xilinx have released FPGA OpenMORE, a reference assessment program and spreadsheet for evaluating the reusability of IP in large, multi-million-gate FPGA designs After six months of beta testing, the FPGA OpenMORE program is now available to the semiconductor design community with endorsements from trial users such as CAST and Telecom Italia Lab
This article was originally published on Electronicstalk on 21 Feb 2001 at 8.00am (UK)
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The FPGA OpenMORE program is available for download at http://www.openmore.com.
Mentor Graphics and Synopsys co-authored the widely used Reuse Methodology Manual (RMM) and co-founded the OpenMORE program.
FPGA OpenMORE is an extension of the RMM that was authored by Xilinx.
In an OpenMORE users' survey conducted in January 2001, respondents identified an FPGA enhancement to OpenMORE as a priority.
FPGA OpenMORE provides an assessment program similar to OpenMORE, enabling companies to define a reuse strategy that allows design teams to work smoothly between both the ASIC and FPGA approaches.
"The collaboration between Mentor Graphics, Synopsys and Xilinx will help accelerate the acceptance and industry-wide usage of this newest addition to OpenMORE", said Mark Aaldering, senior director of the IP Solutions division at Xilinx.
"FPGA OpenMORE is a critical step in the accelerated adoption of FPGAs as the next system-on-chip (SoC) platform.
It is critical that any rating system used for FPGA SoC design reuse not only be standardized for ASICs and FPGAs, but also for different FPGA technologies".
Pierre Bricaud, co-author of the Reuse Methodology Manual and director of marketing for the Inventra Intellectual Property division of Mentor Graphics said, "Trial customers praise the availability of a practical, easy-to-use reference guide for standardizing IP reuse practices for FPGA design.
The OpenMORE program continues to achieve success because of our ability to continually add new measurability criteria in response to changing design paradigms".
Since its release in 1999, OpenMORE has rapidly become the standard assessment program for reuse in many segments of the SoC industry, including systems companies, semiconductor vendors, and IP providers.
The most common uses for the system are for developing reuse infrastructure, for evaluating intellectual property licensed from internal and external IP providers and for developing intellectual property for the commercial IP market.
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