Product category:
Design and Development Software
News Release from: Mentor Graphics UK
Edited by the Electronicstalk Editorial
Team on 08 May 2001
Nordic comes to Mentor for SoC
verification
Nordic VLSI has selected the Mentor Graphics FormalPro equivalence checker to verify its IP and SoC designs.
Nordic VLSI has selected the Mentor Graphics FormalPro equivalence checker to verify its IP and SoC designs Nordic VLSI chose FormalPro for its speed, accuracy and advanced debugging capabilities in both RTL-to-gate and gate-to-gate verification of multi-million-gate SoCs
This article was originally published on Electronicstalk on 21 Feb 2001 at 8.00am (UK)
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"FormalPro showed excellent performance and required minimal set-up time", said Frank Berntsen, technical director at Nordic VLSI.
"After evaluating a variety of equivalence checkers from the major formal verification providers, we found that FormalPro was the solution that best met our requirements for speed and capacity".
"FormalPro was able to meet Nordic VSLI's needs because the product was designed to be easy-to-use, fast and reliable", said Reily Jacoby, FormalPro product line manager at Mentor Graphics.
"Our goal is to provide high-capacity, high-speed formal verification solutions to help companies meet the challenge of verifying complex, multi-million-gate designs in a timeframe that keeps them ahead of their competition".
The FormalPro approach to equivalence checking enables designers to formally verify designs with more than 20 million gates in a matter of hours.
With FormalPro, designers can execute multiple daily runs of multi-million gate designs without having to partition an SoC or ASIC design into blocks.
This increases productivity and decreases the risk of errors split across blocks.
Using FormalPro, the functional equivalence of two circuits can be established with little or no user intervention.
The tool's minimal setup requirements save designers time and allows the easy adoption of formal verification technology into any design flow.
Multiple matching techniques, coupled with multiple solver technology, ensure an automated flow.
FormalPro's advanced debugging technology quickly performs automated analysis of failing comparison points and isolates the exact location of the error, increasing a design team's productivity and shortening turnaround times.
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