Product category:
Design and Development Software
News Release from: Mentor Graphics UK | Subject: Platform Express
Edited by the Electronicstalk Editorial
Team on 15 August 2001
Platform accelerates SoC design and
verification
Mentor Graphics describes its Platform Express environment as the semiconductor design industry's first for rapidly creating, configuring and verifying platform-based, SoC designs.
Mentor Graphics describes its Platform Express environment as the semiconductor design industry's first for rapidly creating, configuring and verifying platform-based, SoC designs The Platform Express environment enables design teams to build and configure a platform core and its corresponding peripherals and software in a virtual prototype
This article was originally published on Electronicstalk on 9 Dec 2004 at 8.00am (UK)
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Mentor Graphics is providing support for the SPIRIT Consortium's new 1.2 XML specification in the newest release of its Platform Express product.
Simultaneously, Platform Express generates a custom verification environment to verify interfaces in the portion of the design surrounding the embedded processor and its attached peripherals.
By automating tedious and error-prone design creation and verification steps, Platform Express shaves months off aggressive product development cycles and allows designers to focus on product differentiators.
"With Platform Express, Mentor Graphics allows SoC designers to rapidly create and verify platform-based SoC designs", said Serge Leef, general manager of the System-on-Chip Verification Division.
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Mentor Graphics and UMC have joined to deliver a complete turnkey design flow, including the availability of IC design kits, for UMC's RF and analogue/mixed-signal process technologies.
Mentor supports TI DSPs and MCUs
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Mentor Graphics and Xilinx have released two high-level IP products to accelerate the design cycle of high-density FPGAs in communications applications.
"Platform Express brings together Mentor's core strengths in intellectual property cores, embedded software, simulation, and emulation to minimize the verification bottleneck".
Maximum performance from SoC designs requires optimal design of the logic surrounding the embedded processor.
As SoC designs have increased in complexity, optimising interfaces around the processor has become a tedious design step.
To assist design groups, processor vendors are now beginning to supply configurable designs (core platforms) that include memory and many common peripherals optimized for use with the processor core, and some standard connection ports onto which additional user-designed logic can be quickly added.
Using Platform Express, designers can browse through a library of available processors, memories and peripherals and drag and drop selected items into a graphical editor.
Platform Express provides a graphical user interface that enables users to create systems as block diagrams.
Platform Express automatically creates the necessary connections between components, depending on a selection of standard buses, including AMBA and VCI.
Platform Express includes a memory map display that automatically displays utilisation of address space.
The platform-based design (PBD) methodology supported with Platform Express not only generates complete hardware and software SoC designs, but also generates custom execution environments required to verify designs.
Each set of verification tools customised for a particular design is called an execution environment.
Most design groups require multiple execution environments to complete the verification of a design's hardware and software.
Each environment will support a different combination of tools and verification targets, and offers different levels of accuracy and performance.
Once graphical entry is complete, Platform Express automatically generates the design, as well as the software to run on the design and a testbench to drive it.
Platform Express then invokes verification tools, transparently generating and executing scripts that would be time-consuming to prepare manually.
Platform Express also automatically generates diagnostic code for each peripheral and memory component in the design.
Designers can proceed to hardware/software coverification using the Seamless coverification tool or to RTL-level hardware verification using the ModelSim tool.
Platform Express enables designers to reap the rewards of a platform-based design methodology and the ability to verify the design as soon as it is created, eliminating months of waiting time as test environments are laboriously created.
Mentor Graphics is collaborating with leading semiconductor firms to provide Platform Express design kits for popular SoC Platforms.
The first platform developers include Oki and Altera.
"Altera continues to push the envelope of programmable logic design with new families of devices that bring SoC functionality to the programmable world", said Tim Southgate, vice president of software product planning and tools marketing at Altera.
"The introduction of processor cores onto our system-on-a-programmable chip architectures makes them ideally suited for creating platforms that simplify the task of optimising hardware/software on-chip interfaces.
Platform Express will accelerate development times for our customers, allowing them to explore several platform configurations in a few hours".
Platform Express uses standard bus specifications, for example the open AMBA from ARM, to enable rapid design and integration of IP into SoC platform designs.
"Integrating components from multiple sources quickly and reliably is the key to fast turnaround on SoC designs", explained Dr John Goodenough, programme manager, Systems Solutions at ARM.
"Tools such as Platform Express enable users to benefit from the wide industry base of IP with an AMBA interface, and to automatically generate the appropriate interconnect".
Platform Express provides an environment in which designers can design and verify memories and peripherals from commercial intellectual property providers.
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