Product category:
Design and Development Software
News Release from: Mentor Graphics UK
Edited by the Electronicstalk Editorial
Team on 22 April 2002
Ricoh adopts Mentor Graphics
LBISTArchitect
Ricoh has adopted the LBISTArchitect logic built-in-self-test (BIST) solution from Mentor Graphics.
Ricoh has adopted the LBISTArchitect logic built-in-self-test (BIST) solution from Mentor Graphics By using the LBISTArchitect tool, Ricoh has developed a design flow for SoC logic that eliminates external stored patterns for increased test efficiency and enhances the overall quality of the design
This article was originally published on Electronicstalk on 21 Feb 2001 at 8.00am (UK)
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"We are convinced of the value in using a full scan approach for logic circuit test and view logic BIST as the next step to help us eliminate stored patterns".
said Takamitsu Yamada, CAD Engineering Section, Imaging System LSI Development Center, at Ricoh.
"As the number of transistors per chip grows, pattern volume increases and becomes a bottleneck in circuit design.
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We have found the BIST approach to be successful in solving this problem".
Prior to using logic BIST, Ricoh established a BIST design flow for embedded memories using the Mentor Graphics MBISTArchitect tool.
In addition to using LBISTArchitect Ricoh also uses other Mentor solutions in its design-for-test (DFT) flow including the DFT-Advisor tool for scan insertion and the FastScan automatic test pattern generation tool.
"As a DFT partner, Mentor Graphics has greatly contributed to our efficient test flows.
Using the LBISTArchitect tool, we eliminated stored patterns and maintained product quality.
We see product quality benefits from increased detection of speed-related defects and the full JTAG control enables a board component diagnosis solution", said ",enji Oka, manager of CAD Engineering Section, Imaging System LSI Development Center, at Ricoh.
"We are proud that Ricoh succeeded in logic BIST as the result of our DFT strategy", said Pat Williams, president of Mentor Graphics Japan.
"We have been strengthening our DFT solutions for several years with the goal of providing dramatic cost reductions as well as productivity and quality improvements to our customers.
LBISTArchitect delivers innovative technology for low-intrusion high-quality test approach".
LBISTArchitect contains patented BIST-Ready technology that ensures very high fault coverage without timing, routing and power dissipation overhead traditionally seen in BIST.
The product's patented multiphase test point insertion MTPI technology increases a design's fault coverage while adding control and observe points to test any logic resistant to random patterns.
The MTPI technology ensures test points are not added to either timing critical areas or paths within the design.
The tool's design rules checks can run at any stage of the design and test process, and combined with the parameterisable BIST controller, ensures that the BIST implementation can handle engineering change orders (ECOs) without the need for re-synthesis.
The board-level component test offered by LBISTArchitect enables manufacturers to efficiently diagnose failing printed circuit boards.
Logic BIST technology can be used to identify the failing devices on the boards, allowing users to replace only the defective parts rather than the entire board, save tremendous amounts of time and money and maintain board manufacturing quality.
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