Product category:
Design and Development Software
News Release from: Mentor Graphics UK
Edited by the Electronicstalk Editorial
Team on 25 October 2002
ModelSim achieves Verilog/mixed HDL
sign-off
The Model Technology ModelSim hardware description language (HDL) simulation tool has achieved Verilog/mixed HDL sign-off quality at Austriamicrosystems.
The Model Technology ModelSim hardware description language (HDL) simulation tool has achieved Verilog/mixed HDL sign-off quality at Austriamicrosystems ModelSim can now be used in all CMOS, BiCMOS and SiGe-BiCMOS processes
This article was originally published on Electronicstalk on 21 Feb 2001 at 8.00am (UK)
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Customers are able to design and simulate in their design language of choice (Verilog, VHDL or a mixed HDL) throughout all levels of abstraction, from high-level behavioural through gate-level.
"ModelSim is an excellent choice when it comes down to language support, mixed HDL simulation and integration with the Mentor Graphics analogue/mixed-signal solution", said Rainer Holzhaider, Director Foundry Services, Austriamicrosystems.
"These are the reasons for qualifying ModelSim with its Verilog, VHDL and mixed language capabilities.
Our internal and external customers are increasing their productivity through leveraging the advanced debugging capabilities of ModelSim".
"Austriamicrosystems is one of the first mixed-signal foundries supporting ModelSim Verilog/mixed HDL with sign-off quality", said John Lenyo, director of marketing, Model Technology.
"Mutual worldwide customers are able to verify their highly advanced circuits competently, leveraging ModelSim's advantages in combination with their specialty processes and design environment.
We are pleased to see that ModelSim is the product of choice within the Austriamicrosystems vertical product segments".
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