Product category:
Intellectual Property Cores
News Release from: Mentor Graphics UK | Subject: USV 2.0 PHY/controller solution
Edited by the Electronicstalk Editorial
Team on 27 November 2002
IP provides pretested USB 2.0 solution
Mentor Graphics and Genesys Logic have developed an integrated physical layer and controller solution for USB 2.0-compliant applications.
Mentor Graphics and Genesys Logic have developed an integrated physical layer (PHY) and controller solution for Universal Serial Bus (USB) 2.0-compliant applications This collaboration provides Mentor Graphics customers with a silicon-proven solution that includes high-speed function-to-host connectivity, On-The-Go (OTG) support for function-to-function communication, with a fully integrated PHY
This article was originally published on Electronicstalk on 21 Feb 2001 at 8.00am (UK)
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"Our cores are already proven in silicon and have undergone full compliance testing, saving customers considerable time in coding and verification, as well as reducing the risk of failure due to incorrect interpretation of the standard", said Michael Kaskowitz, General Manager of the Intellectual Property Division of Mentor Graphics.
"Our roadmap is to continue to lead the development of standards-compliant cores that provide our customers with a significant time-to-market advantage".
The Mentor Graphics and Genesys Logic offering delivers an area-efficient solution that is well suited for the highly integrated chips used in consumer products such as digital cameras, MP3 players, PDAs and storage devices.
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The USB solution complies with all the latest standards and Mentor Graphics is one of only a few IP companies that test the compliance of their own cores.
The knowledge base gained from this rigorous testing discipline - software, hardware, integration, verification and compliance - allows Mentor Graphics to provide unparalleled support to customers all the way through their design cycle.
"Genesys Logic was involved in designing USB 2.0 technologies before the specification was finalised", said Forster Shih, President and CEO from Genesys Logic.
"This early work has paid dividends and our products are now in mass production, receiving favourable recognition from a number of systems developers.
This collaboration with Mentor Graphics is a win for our customers as it provides them with a preverified, off-the-shelf solution that can easily and quickly integrate into future products".
The GL800 USB 2.0 physical layer transceiver from Genesys Logic integrates high-speed, mixed-signal circuitry to serve as the interface between the high performance USB controller and the 16bit SIE bus.
The USB 2.0 Transceiver Macrocell Interface (UTMI)-compliant transceiver handles the low level USB protocol and signalling, which includes features such as data serialisation and deserialisation, bit stuffing, and clock recovery and synchronisation.
This combination of the Mentor Graphics controller with the Genesys PHY provides a powerful solution for cost-sensitive consumer products by integrating both functions into a single chip.
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